diff --git a/ZDBMS/BMS_CC/.settings/language.settings.xml b/ZDBMS/BMS_CC/.settings/language.settings.xml
index d15ddd3..5df2bf4 100644
--- a/ZDBMS/BMS_CC/.settings/language.settings.xml
+++ b/ZDBMS/BMS_CC/.settings/language.settings.xml
@@ -5,7 +5,7 @@
-
+
diff --git a/ZDBMS/BMS_CC/User/main.c b/ZDBMS/BMS_CC/User/main.c
index 0009698..1778e3b 100644
--- a/ZDBMS/BMS_CC/User/main.c
+++ b/ZDBMS/BMS_CC/User/main.c
@@ -19,6 +19,8 @@
*/
#include "debug.h"
+#include "../init/inc/init.h"
+#include "../app/inc/app.h"
/* Global typedef */
@@ -33,18 +35,24 @@
*
* @return none
*/
+
int main(void)
{
NVIC_PriorityGroupConfig(NVIC_PriorityGroup_1);
SystemCoreClockUpdate();
Delay_Init();
USART_Printf_Init(115200);
+
+ all_hardWare_init();
printf("SystemClk:%d\r\n", SystemCoreClock);
printf( "ChipID:%08x\r\n", DBGMCU_GetCHIPID() );
+ uint8_t i = 1;
while(1)
{
+
Delay_Ms(1000);
+ GPIO_WriteBit(GPIOC, GPIO_Pin_13, (i==0) ? (i=Bit_SET):(i=Bit_RESET)); //翻转GPIO
printf("This is printf example cc\r\n");
}
}
diff --git a/ZDBMS/BMS_CC/User/system_ch32l103.c b/ZDBMS/BMS_CC/User/system_ch32l103.c
index 73ec2c8..8cd8f7e 100644
--- a/ZDBMS/BMS_CC/User/system_ch32l103.c
+++ b/ZDBMS/BMS_CC/User/system_ch32l103.c
@@ -16,7 +16,7 @@
* reset the HSI is used as SYSCLK source).
* If none of the define below is enabled, the HSI is used as System clock source.
*/
-//#define SYSCLK_FREQ_HSE HSE_VALUE
+#define SYSCLK_FREQ_HSE HSE_VALUE
//#define SYSCLK_FREQ_48MHz_HSE 48000000
//#define SYSCLK_FREQ_56MHz_HSE 56000000
//#define SYSCLK_FREQ_72MHz_HSE 72000000
@@ -25,7 +25,7 @@
//#define SYSCLK_FREQ_48MHz_HSI 48000000
//#define SYSCLK_FREQ_56MHz_HSI 56000000
//#define SYSCLK_FREQ_72MHz_HSI 72000000
-#define SYSCLK_FREQ_96MHz_HSI 96000000
+//#define SYSCLK_FREQ_96MHz_HSI 96000000
//#define SYSCLK_FREQ_HSI_LP HSI_LP_VALUE /* Baud rate support less than 62.5Kbps when using UART */
/* Clock Definitions */
diff --git a/ZDBMS/BMS_CC/app/inc/app.h b/ZDBMS/BMS_CC/app/inc/app.h
new file mode 100644
index 0000000..13afec5
--- /dev/null
+++ b/ZDBMS/BMS_CC/app/inc/app.h
@@ -0,0 +1,24 @@
+/*
+ * app.h
+ *
+ * Created on: 2025年2月24日
+ * Author: Cerlink
+ */
+
+#ifndef APP_INC_APP_H_
+#define APP_INC_APP_H_
+
+#include "ch32l103_conf.h"
+
+#include "../../app/inc/timeIT.h"
+
+
+/*
+ * 定时器相关
+ */
+extern volatile uint8_t g_timer1SFlag; //1S定时标志
+extern volatile uint8_t g_timer50MsFlag; //20Ms定时标志
+
+
+
+#endif /* APP_INC_APP_H_ */
diff --git a/ZDBMS/BMS_CC/app/inc/timeIT.h b/ZDBMS/BMS_CC/app/inc/timeIT.h
new file mode 100644
index 0000000..90e6982
--- /dev/null
+++ b/ZDBMS/BMS_CC/app/inc/timeIT.h
@@ -0,0 +1,14 @@
+/*
+ * timeIT.h
+ *
+ * Created on: 2025年2月25日
+ * Author: Cerlink
+ */
+
+#ifndef APP_INC_TIMEIT_H_
+#define APP_INC_TIMEIT_H_
+
+#include "ch32l103_conf.h"
+
+
+#endif /* APP_INC_TIMEIT_H_ */
diff --git a/ZDBMS/BMS_CC/app/src/timeIT.c b/ZDBMS/BMS_CC/app/src/timeIT.c
new file mode 100644
index 0000000..5c14b0a
--- /dev/null
+++ b/ZDBMS/BMS_CC/app/src/timeIT.c
@@ -0,0 +1,37 @@
+/*
+ * timeIT.c
+ *
+ * Created on: 2025年2月25日
+ * Author: Cerlink
+ */
+
+#include "../../app/inc/timeIT.h"
+
+//定时器2
+void TIM2_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+
+uint8_t Ms_Times_50 = 0;//50Ms的5Ms次数
+uint8_t S_Times_1 = 0;//1S的5Ms次数
+volatile uint8_t g_timer50MsFlag = 0;
+volatile uint8_t g_timer1SFlag = 0;
+//定时器中断
+void TIM2_IRQHandler(void)
+{
+ if(TIM_GetITStatus(TIM2, TIM_IT_Update) != RESET) //检查TIM2中断是否发生。
+ {
+ Ms_Times_50++;
+ S_Times_1++;
+ if(Ms_Times_50 >= 10)
+ {
+ Ms_Times_50 = 0;
+ g_timer50MsFlag = 1;
+ }
+ if(S_Times_1 >= 200)
+ {
+ S_Times_1 = 0;
+ g_timer1SFlag = 1;
+ }
+
+ TIM_ClearITPendingBit(TIM2,TIM_IT_Update); //清除TIM2的中断挂起位。
+ }
+}
diff --git a/ZDBMS/BMS_CC/init/inc/gpio.h b/ZDBMS/BMS_CC/init/inc/gpio.h
new file mode 100644
index 0000000..d7438d1
--- /dev/null
+++ b/ZDBMS/BMS_CC/init/inc/gpio.h
@@ -0,0 +1,8 @@
+#ifndef __GPIO_H
+#define __GPIO_H
+
+#include "ch32l103_conf.h"
+
+void all_gpio_Init(void);
+
+#endif //__GPIO_H
diff --git a/ZDBMS/BMS_CC/init/inc/init.h b/ZDBMS/BMS_CC/init/inc/init.h
new file mode 100644
index 0000000..c7b3900
--- /dev/null
+++ b/ZDBMS/BMS_CC/init/inc/init.h
@@ -0,0 +1,20 @@
+/*
+ * init.h
+ *
+ * Created on: 2025年2月24日
+ * Author: Cerlink
+ */
+
+#ifndef INIT_INC_INIT_H_
+#define INIT_INC_INIT_H_
+
+#include "ch32l103_conf.h"
+
+#include "../init/inc/gpio.h"
+#include "../init/inc/tim.h"
+
+void all_hardWare_init(void);
+
+
+
+#endif /* INIT_INC_INIT_H_ */
diff --git a/ZDBMS/BMS_CC/init/inc/tim.h b/ZDBMS/BMS_CC/init/inc/tim.h
new file mode 100644
index 0000000..e2fd6d0
--- /dev/null
+++ b/ZDBMS/BMS_CC/init/inc/tim.h
@@ -0,0 +1,17 @@
+/*
+ * tim.h
+ *
+ * Created on: 2025年2月24日
+ * Author: Cerlink
+ */
+
+#ifndef INIT_INC_TIM_H_
+#define INIT_INC_TIM_H_
+
+#include "ch32l103_conf.h"
+
+void all_tim_Init(void);
+
+
+
+#endif /* INIT_INC_TIM_H_ */
diff --git a/ZDBMS/BMS_CC/init/src/gpio.c b/ZDBMS/BMS_CC/init/src/gpio.c
new file mode 100644
index 0000000..ea3e43c
--- /dev/null
+++ b/ZDBMS/BMS_CC/init/src/gpio.c
@@ -0,0 +1,26 @@
+#include "../../init/inc/gpio.h"
+
+/*
+ * LED初始化
+ */
+static void LED_Init(void)
+{
+ GPIO_InitTypeDef GPIO_InitStructure; //定义一个GPIO_InitTypeDef类型的结构体
+
+ RCC_PB2PeriphClockCmd(RCC_PB2Periph_GPIOC, ENABLE); //使能与LED相关的GPIO端口时钟
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13; //配置GPIO引脚
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; //设置GPIO模式为推挽输出
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz; //设置GPIO口输出速度
+ GPIO_Init(GPIOC, &GPIO_InitStructure); //调用库函数，初始化GPIOC
+
+ GPIO_SetBits(GPIOC,GPIO_Pin_13); //设置引脚输出高电平
+}
+
+/*
+ * 初始化所有GPIO
+ */
+void all_gpio_Init(void)
+{
+ LED_Init();
+}
diff --git a/ZDBMS/BMS_CC/init/src/init.c b/ZDBMS/BMS_CC/init/src/init.c
new file mode 100644
index 0000000..dab339c
--- /dev/null
+++ b/ZDBMS/BMS_CC/init/src/init.c
@@ -0,0 +1,14 @@
+/*
+ * init.c
+ *
+ * Created on: 2025年2月24日
+ * Author: Cerlink
+ */
+
+#include "../../init/inc/init.h"
+
+void all_hardWare_init(void)
+{
+ all_gpio_Init();
+ all_tim_Init();
+}
diff --git a/ZDBMS/BMS_CC/init/src/tim.c b/ZDBMS/BMS_CC/init/src/tim.c
new file mode 100644
index 0000000..bb32f0c
--- /dev/null
+++ b/ZDBMS/BMS_CC/init/src/tim.c
@@ -0,0 +1,49 @@
+/*
+ * tim.c
+ *
+ * Created on: 2025年2月24日
+ * Author: Cerlink
+ */
+
+#include "../../init/inc/tim.h"
+
+
+/*
+ * 初始化时钟2，作为定时基准使用
+ */
+static void TIM2_Int_Init(u16 arr,u16 psc)
+{
+ TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ RCC_PB1PeriphClockCmd(RCC_PB1Periph_TIM2, ENABLE); //使能TIM1时钟
+
+ TIM_TimeBaseStructure.TIM_Period = arr; //指定下次更新事件时要加载到活动自动重新加载寄存器中的周期值。
+ TIM_TimeBaseStructure.TIM_Prescaler = psc; //指定用于划分TIM时钟的预分频器值。
+ TIM_TimeBaseStructure.TIM_ClockDivision = TIM_CKD_DIV1; //时钟分频因子
+ TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up; //TIM计数模式，向上计数模式
+ TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure); //根据指定的参数初始化TIMx的时间基数单位
+
+ TIM_ITConfig(TIM2,TIM_IT_Update,ENABLE ); //使能TIM2中断，允许更新中断
+
+ //初始化TIM NVIC，设置中断优先级分组
+ NVIC_InitStructure.NVIC_IRQChannel = TIM2_IRQn; //TIM2中断
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0; //设置抢占优先级0
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //设置响应优先级3
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //使能通道1中断
+ NVIC_Init(&NVIC_InitStructure); //初始化NVIC
+
+ TIM_Cmd(TIM2, ENABLE); //TIM2使能
+}
+
+
+/*
+ * 初始化所有时钟
+ */
+void all_tim_Init(void)
+{
+ TIM2_Int_Init(4999, 7);//5Ms一个中断
+}
+
+
+
diff --git a/ZDBMS/BMS_CC/obj/BMS_CC.elf b/ZDBMS/BMS_CC/obj/BMS_CC.elf
index 8edf5b7..1a153ab 100644
Binary files a/ZDBMS/BMS_CC/obj/BMS_CC.elf and b/ZDBMS/BMS_CC/obj/BMS_CC.elf differ
diff --git a/ZDBMS/BMS_CC/obj/BMS_CC.hex b/ZDBMS/BMS_CC/obj/BMS_CC.hex
index 77804f0..5e6f513 100644
--- a/ZDBMS/BMS_CC/obj/BMS_CC.hex
+++ b/ZDBMS/BMS_CC/obj/BMS_CC.hex
@@ -1,22 +1,22 @@
-:040000006F00C0408D
-:100004000000000000000000480200004A02000056
-:10001400000000000A0400000000000000000000CE
-:100024000A0400000A0400000000000000000000B0
-:100034000A040000000000000A04000000000000A0
-:100044000A0400000A0400000A0400000A04000074
-:100054000A0400000A0400000A0400000A04000064
-:100064000A0400000A0400000A0400000A04000054
-:100074000A0400000A0400000A0400000A04000044
-:100084000A0400000A0400000A0400000A04000034
-:100094000A0400000A0400000A0400000A04000024
-:1000A4000A0400000A0400000A0400000A04000014
-:1000B4000A0400000A0400000A0400000A04000004
-:1000C4000A0400000A0400000A0400000A040000F4
-:1000D4000A0400000A0400000A0400000A040000E4
-:1000E4000A0400000A0400000A0400000A040000D4
-:1000F4000A0400000A0400000A0400000A040000C4
-:100104000A0400000A040000000000000A040000C1
-:100114000A040000000000000000000000000000CD
+:040000006F008052BB
+:100004000000000000000000300300003203000084
+:1000140000000000260500000000000000000000B1
+:100024002605000026050000000000000000000076
+:100034002605000000000000260500000000000066
+:100044002605000026050000260500002605000000
+:1000540026050000260500002605000026050000F0
+:1000640026050000260500002605000026050000E0
+:1000740026050000260500002605000026050000D0
+:1000840026050000260500002605000026050000C0
+:1000940026050000260500002605000026050000B0
+:1000A40026050000260500002605000026050000A0
+:1000B400D4020000260500002605000026050000E5
+:1000C4002605000026050000260500002605000080
+:1000D4002605000026050000260500002605000070
+:1000E4002605000026050000260500002605000060
+:1000F4002605000026050000260500002605000050
+:10010400260500002605000000000000260500006A
+:1001140026050000000000000000000000000000B0
:1001240000000000000000000000000000000000CB
:0C013400000000000000000000000000BF
:10014000397101436EC619A0397141536AC866CA34
@@ -35,454 +35,492 @@
:10021000B7002300B700828093F5F50F9396850011
:10022000D58D93960501D58D61B7939627009702DA
:10023000000096968682E78086FA9680C1171D8F09
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diff --git a/ZDBMS/BMS_CC/obj/BMS_CC.lst b/ZDBMS/BMS_CC/obj/BMS_CC.lst
index 78b5721..3e26f03 100644
--- a/ZDBMS/BMS_CC/obj/BMS_CC.lst
+++ b/ZDBMS/BMS_CC/obj/BMS_CC.lst
@@ -7,10 +7,10 @@ start address 0x00000000
Program Header:
LOAD off 0x00001000 vaddr 0x00000000 paddr 0x00000000 align 2**12
- filesz 0x00001db8 memsz 0x00001db8 flags r-x
- LOAD off 0x00003000 vaddr 0x20000000 paddr 0x00001db8 align 2**12
- filesz 0x00000098 memsz 0x000000c0 flags rw-
- LOAD off 0x00003800 vaddr 0x20004800 paddr 0x20004800 align 2**12
+ filesz 0x00002018 memsz 0x00002018 flags r-x
+ LOAD off 0x00004000 vaddr 0x20000000 paddr 0x00002018 align 2**12
+ filesz 0x00000098 memsz 0x000000c4 flags rw-
+ LOAD off 0x00004800 vaddr 0x20004800 paddr 0x20004800 align 2**12
filesz 0x00000000 memsz 0x00000800 flags rw-
Sections:
@@ -19,49 +19,49 @@ Idx Name Size VMA LMA File off Algn
CONTENTS, ALLOC, LOAD, READONLY, CODE
1 .vector 0000013c 00000004 00000004 00001004 2**1
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 2 .text 00001c78 00000140 00000140 00001140 2**2
+ 2 .text 00001ed8 00000140 00000140 00001140 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
- 3 .fini 00000000 00001db8 00001db8 00003098 2**0
+ 3 .fini 00000000 00002018 00002018 00004098 2**0
CONTENTS, ALLOC, LOAD, CODE
- 4 .dalign 00000000 20000000 20000000 00003098 2**0
+ 4 .dalign 00000000 20000000 20000000 00004098 2**0
CONTENTS
- 5 .dlalign 00000000 00001db8 00001db8 00003098 2**0
+ 5 .dlalign 00000000 00002018 00002018 00004098 2**0
CONTENTS
- 6 .data 00000098 20000000 00001db8 00003000 2**2
+ 6 .data 00000098 20000000 00002018 00004000 2**2
CONTENTS, ALLOC, LOAD, DATA
- 7 .bss 00000028 20000098 00001e50 00003098 2**2
+ 7 .bss 0000002c 20000098 000020b0 00004098 2**2
ALLOC
- 8 .stack 00000800 20004800 20004800 00003800 2**0
+ 8 .stack 00000800 20004800 20004800 00004800 2**0
ALLOC
- 9 .debug_info 0000857c 00000000 00000000 00003098 2**0
+ 9 .debug_info 0000e480 00000000 00000000 00004098 2**0
CONTENTS, READONLY, DEBUGGING
- 10 .debug_abbrev 0000197a 00000000 00000000 0000b614 2**0
+ 10 .debug_abbrev 000027ae 00000000 00000000 00012518 2**0
CONTENTS, READONLY, DEBUGGING
- 11 .debug_aranges 00000430 00000000 00000000 0000cf90 2**3
+ 11 .debug_aranges 00000790 00000000 00000000 00014cc8 2**3
CONTENTS, READONLY, DEBUGGING
- 12 .debug_ranges 000003e0 00000000 00000000 0000d3c0 2**3
+ 12 .debug_ranges 00000780 00000000 00000000 00015458 2**3
CONTENTS, READONLY, DEBUGGING
- 13 .debug_line 00004fb9 00000000 00000000 0000d7a0 2**0
+ 13 .debug_line 00008fdf 00000000 00000000 00015bd8 2**0
CONTENTS, READONLY, DEBUGGING
- 14 .debug_str 000018fc 00000000 00000000 00012759 2**0
+ 14 .debug_str 000025da 00000000 00000000 0001ebb7 2**0
CONTENTS, READONLY, DEBUGGING
- 15 .comment 00000033 00000000 00000000 00014055 2**0
+ 15 .comment 00000033 00000000 00000000 00021191 2**0
CONTENTS, READONLY
- 16 .debug_frame 000010a0 00000000 00000000 00014088 2**2
+ 16 .debug_frame 0000178c 00000000 00000000 000211c4 2**2
CONTENTS, READONLY, DEBUGGING
- 17 .debug_loc 00001a6d 00000000 00000000 00015128 2**0
+ 17 .debug_loc 000034c5 00000000 00000000 00022950 2**0
CONTENTS, READONLY, DEBUGGING
- 18 .stab 00000084 00000000 00000000 00016b98 2**2
+ 18 .stab 00000084 00000000 00000000 00025e18 2**2
CONTENTS, READONLY, DEBUGGING
- 19 .stabstr 00000117 00000000 00000000 00016c1c 2**0
+ 19 .stabstr 00000117 00000000 00000000 00025e9c 2**0
CONTENTS, READONLY, DEBUGGING
SYMBOL TABLE:
00000000 l d .init 00000000 .init
00000004 l d .vector 00000000 .vector
00000140 l d .text 00000000 .text
-00001db8 l d .fini 00000000 .fini
+00002018 l d .fini 00000000 .fini
20000000 l d .dalign 00000000 .dalign
-00001db8 l d .dlalign 00000000 .dlalign
+00002018 l d .dlalign 00000000 .dlalign
20000000 l d .data 00000000 .data
20000098 l d .bss 00000000 .bss
20004800 l d .stack 00000000 .stack
@@ -78,6 +78,10 @@ SYMBOL TABLE:
00000000 l d .stabstr 00000000 .stabstr
00000000 l df *ABS* 00000000 ./Startup/startup_ch32l103.o
00000004 l .vector 00000000 _vector_base
+00000000 l df *ABS* 00000000 gpio.c
+00000000 l df *ABS* 00000000 init.c
+00000000 l df *ABS* 00000000 tim.c
+00000000 l df *ABS* 00000000 timeIT.c
00000000 l df *ABS* 00000000 ch32l103_it.c
00000000 l df *ABS* 00000000 main.c
00000000 l df *ABS* 00000000 system_ch32l103.c
@@ -87,10 +91,11 @@ SYMBOL TABLE:
00000000 l df *ABS* 00000000 ch32l103_rcc.c
20000010 l O .data 00000010 PBHBPrescTable
20000084 l O .data 00000004 ADCPrescTable
+00000000 l df *ABS* 00000000 ch32l103_tim.c
00000000 l df *ABS* 00000000 ch32l103_usart.c
00000000 l df *ABS* 00000000 debug.c
-200000b0 l O .bss 00000002 p_ms
-200000b2 l O .bss 00000002 p_us
+200000b4 l O .bss 00000002 p_ms
+200000b6 l O .bss 00000002 p_us
20000088 l O .data 00000004 curbrk.5011
00000000 l df *ABS* 00000000 printf.c
00000000 l df *ABS* 00000000 puts.c
@@ -98,13 +103,13 @@ SYMBOL TABLE:
00000000 l df *ABS* 00000000 wsetup.c
00000000 l df *ABS* 00000000 fflush.c
00000000 l df *ABS* 00000000 findfp.c
-00000f94 l F .text 00000066 std
+000011f6 l F .text 00000066 std
00000000 l df *ABS* 00000000 fwalk.c
00000000 l df *ABS* 00000000 makebuf.c
00000000 l df *ABS* 00000000 nano-mallocr.c
00000000 l df *ABS* 00000000 nano-mallocr.c
00000000 l df *ABS* 00000000 nano-vfprintf.c
-0000141a l F .text 00000028 __sfputc_r
+0000167c l F .text 00000028 __sfputc_r
00000000 l df *ABS* 00000000 nano-vfprintf_i.c
00000000 l df *ABS* 00000000 sbrkr.c
00000000 l df *ABS* 00000000 stdio.c
@@ -124,321 +129,337 @@ SYMBOL TABLE:
00000000 l df *ABS* 00000000 impure.c
20000020 l O .data 00000060 impure_data
00000000 l df *ABS* 00000000 reent.c
-0000040a w .text 00000000 EXTI2_IRQHandler
-00001c06 g F .text 00000028 _isatty_r
-00000b6a g F .text 000000d4 _puts_r
-00001c2e g F .text 0000002c _lseek_r
-00000b2a g F .text 00000040 printf
+00000526 w .text 00000000 EXTI2_IRQHandler
+00001e68 g F .text 00000028 _isatty_r
+00000dcc g F .text 000000d4 _puts_r
+00001e90 g F .text 0000002c _lseek_r
+00000d8c g F .text 00000040 printf
20000880 g .data 00000000 __global_pointer$
00000148 g F .text 00000028 .hidden __riscv_save_8
-0000040a w .text 00000000 TIM1_CC_IRQHandler
-00001b50 g F .text 00000030 __sseek
-0000104a g F .text 00000066 __sinit
-00000c48 g F .text 000000bc __swbuf_r
-0000024a g F .text 00000010 HardFault_Handler
-00001004 g F .text 00000046 __sfmoreglue
-00001c74 g F .text 00000002 __malloc_unlock
-0000040a w .text 00000000 USBPD_IRQHandler
+00000526 w .text 00000000 TIM1_CC_IRQHandler
+2000009b g O .bss 00000001 g_timer50MsFlag
+00001db2 g F .text 00000030 __sseek
+000012ac g F .text 00000066 __sinit
+00000eaa g F .text 000000bc __swbuf_r
+00000332 g F .text 00000010 HardFault_Handler
+00001266 g F .text 00000046 __sfmoreglue
+00001ed6 g F .text 00000002 __malloc_unlock
+00000526 w .text 00000000 USBPD_IRQHandler
00000194 g F .text 0000000c .hidden __riscv_restore_3
-0000040a w .text 00000000 SysTick_Handler
-0000040a w .text 00000000 PVD_IRQHandler
+00000526 w .text 00000000 SysTick_Handler
+00000976 g F .text 00000054 NVIC_Init
+00000526 w .text 00000000 PVD_IRQHandler
00000180 g F .text 00000020 .hidden __riscv_restore_10
-00000248 g F .text 00000002 NMI_Handler
-0000040a w .text 00000000 EXTI3_IRQHandler
+00000276 g F .text 0000000a all_hardWare_init
+00000330 g F .text 00000002 NMI_Handler
+00000526 w .text 00000000 EXTI3_IRQHandler
00000148 g F .text 00000028 .hidden __riscv_save_11
-00000492 g F .text 00000006 DBGMCU_GetCHIPID
-00000a18 g F .text 0000000a USART_GetFlagStatus
-00001bdc g F .text 0000002a _fstat_r
-200000a8 g O .bss 00000002 USBPD_CFG
-200000bc g O .bss 00000004 errno
+000005ae g F .text 00000006 DBGMCU_GetCHIPID
+20000099 g O .bss 00000001 S_Times_1
+00000c78 g F .text 0000000a USART_GetFlagStatus
+00001e3e g F .text 0000002a _fstat_r
+200000ac g O .bss 00000002 USBPD_CFG
+200000c0 g O .bss 00000004 errno
20000098 g .bss 00000000 _sbss
00000800 g *ABS* 00000000 __stack_size
-00000a78 g F .text 00000052 USART_Printf_Init
-0000040a w .text 00000000 USBFS_IRQHandler
+00000cd8 g F .text 00000054 USART_Printf_Init
+00000526 w .text 00000000 USBFS_IRQHandler
00000194 g F .text 0000000c .hidden __riscv_restore_2
-00000ffa g F .text 0000000a _cleanup_r
-00000558 g F .text 0000012c GPIO_PinRemapConfig
-0000040a w .text 00000000 EXTI0_IRQHandler
-0000040a w .text 00000000 I2C2_EV_IRQHandler
-0000040a w .text 00000000 LPTIM_IRQHandler
-00000c3e g F .text 0000000a puts
+0000125c g F .text 0000000a _cleanup_r
+00000682 g F .text 0000012c GPIO_PinRemapConfig
+00000526 w .text 00000000 EXTI0_IRQHandler
+00000526 w .text 00000000 I2C2_EV_IRQHandler
+00000526 w .text 00000000 LPTIM_IRQHandler
+00000b52 g F .text 00000018 TIM_Cmd
+00000ea0 g F .text 0000000a puts
+00000248 g F .text 0000002e all_gpio_Init
20000080 g O .data 00000004 SystemCoreClock
-00001cae g F .text 0000000c _fstat
+00001f10 g F .text 0000000c _fstat
00000004 g .init 00000000 _einit
+00000b94 g F .text 0000000c TIM_ClearITPendingBit
00000140 g F .text 00000030 .hidden __riscv_save_12
-00000498 g F .text 000000c0 GPIO_Init
-0000040a w .text 00000000 Break_Point_Handler
+000005b4 g F .text 000000c0 GPIO_Init
+00000526 w .text 00000000 Break_Point_Handler
00000180 g F .text 00000020 .hidden __riscv_restore_11
-200000ac g O .bss 00000004 NVIC_Priority_Group
-0000040a w .text 00000000 SPI1_IRQHandler
-000009fa g F .text 00000016 USART_Cmd
-00001ab2 g F .text 0000002a _sbrk_r
-2000009c g O .bss 00000004 CHIPID
-0000040a w .text 00000000 TAMPER_IRQHandler
+200000b0 g O .bss 00000004 NVIC_Priority_Group
+00000526 w .text 00000000 SPI1_IRQHandler
+00000c5a g F .text 00000016 USART_Cmd
+00001d14 g F .text 0000002a _sbrk_r
+200000a0 g O .bss 00000004 CHIPID
+00000526 w .text 00000000 TAMPER_IRQHandler
00000170 g F .text 0000000c .hidden __riscv_save_1
00000194 g F .text 0000000c .hidden __riscv_restore_0
-00001c76 g F .text 0000002c _read_r
+00001ed8 g F .text 0000002c _read_r
00000156 g F .text 0000001a .hidden __riscv_save_7
-0000040a w .text 00000000 Ecall_M_Mode_Handler
+00000526 w .text 00000000 Ecall_M_Mode_Handler
20004800 g .stack 00000000 _heap_end
-00001cba g F .text 0000000c _isatty
+00001f1c g F .text 0000000c _isatty
20000090 g O .data 00000004 _global_impure_ptr
0000018a g F .text 00000016 .hidden __riscv_restore_5
-20000098 g O .bss 00000002 ADC_Trim
-0000040a w .text 00000000 DMA1_Channel4_IRQHandler
-00000b04 g F .text 00000026 _sbrk
+2000009c g O .bss 00000002 ADC_Trim
+00000526 w .text 00000000 DMA1_Channel4_IRQHandler
+00000d66 g F .text 00000026 _sbrk
+20000098 g O .bss 00000001 Ms_Times_50
0000018a g F .text 00000016 .hidden __riscv_restore_6
-0000040a w .text 00000000 USART3_IRQHandler
-0000040a w .text 00000000 RTC_IRQHandler
-200000c0 g .bss 00000000 _ebss
-0000040a w .text 00000000 DMA1_Channel7_IRQHandler
-0000040a w .text 00000000 CAN1_RX1_IRQHandler
-00000a22 g F .text 00000020 Delay_Init
-00000922 g F .text 0000001e RCC_PB2PeriphClockCmd
-00000684 g F .text 000001c2 GPIO_IPD_Unused
-0000040a w .text 00000000 USBPDWakeUp_IRQHandler
-0000040a w .text 00000000 TIM4_IRQHandler
+00000526 w .text 00000000 USART3_IRQHandler
+00000526 w .text 00000000 RTC_IRQHandler
+200000c4 g .bss 00000000 _ebss
+00000526 w .text 00000000 DMA1_Channel7_IRQHandler
+00000526 w .text 00000000 CAN1_RX1_IRQHandler
+00000c82 g F .text 00000020 Delay_Init
+00000aa0 g F .text 0000001e RCC_PB2PeriphClockCmd
+000007ae g F .text 000001c2 GPIO_IPD_Unused
+00000526 w .text 00000000 USBPDWakeUp_IRQHandler
+00000674 g F .text 00000004 GPIO_SetBits
+00000526 w .text 00000000 TIM4_IRQHandler
00000148 g F .text 00000028 .hidden __riscv_save_9
-00001d1c g O .text 00000020 __sf_fake_stderr
+00000678 g F .text 0000000a GPIO_WriteBit
+00001f7c g O .text 00000020 __sf_fake_stderr
00000156 g F .text 0000001a .hidden __riscv_save_4
-0000040a w .text 00000000 I2C1_EV_IRQHandler
-0000040a w .text 00000000 USART4_IRQHandler
-0000084c g F .text 000000d6 RCC_GetClocksFreq
-0000040a w .text 00000000 DMA1_Channel6_IRQHandler
-00001442 g F .text 00000040 __sfputs_r
-200000a4 g O .bss 00000004 TS_Val
-00001c5a g F .text 00000018 memchr
-00000940 g F .text 000000ba USART_Init
-0000129e g F .text 000000a8 _free_r
-0000040a w .text 00000000 TIM3_IRQHandler
-0000040a w .text 00000000 RCC_IRQHandler
+00000526 w .text 00000000 I2C1_EV_IRQHandler
+00000526 w .text 00000000 USART4_IRQHandler
+00000b7c g F .text 00000018 TIM_GetITStatus
+000009ca g F .text 000000d6 RCC_GetClocksFreq
+00000526 w .text 00000000 DMA1_Channel6_IRQHandler
+000016a4 g F .text 00000040 __sfputs_r
+200000a8 g O .bss 00000004 TS_Val
+00001ebc g F .text 00000018 memchr
+00000ba0 g F .text 000000ba USART_Init
+00001500 g F .text 000000a8 _free_r
+00000526 w .text 00000000 TIM3_IRQHandler
+00000526 w .text 00000000 RCC_IRQHandler
00000170 g F .text 0000000c .hidden __riscv_save_3
-0000040a w .text 00000000 TIM1_TRG_COM_IRQHandler
-0000040a w .text 00000000 DMA1_Channel1_IRQHandler
+00000526 w .text 00000000 TIM1_TRG_COM_IRQHandler
+00000526 w .text 00000000 DMA1_Channel1_IRQHandler
00000000 g .init 00000000 _start
-00001cc6 g F .text 0000000c _lseek
-0000040a w .text 00000000 EXTI15_10_IRQHandler
-0000040a w .text 00000000 ADC_IRQHandler
-200000a0 g O .bss 00000004 OPA_Trim
-0000040a w .text 00000000 DMA1_Channel8_IRQHandler
-00001bb4 g F .text 00000028 _close_r
+2000009a g O .bss 00000001 g_timer1SFlag
+00001f28 g F .text 0000000c _lseek
+00000abe g F .text 0000001e RCC_PB1PeriphClockCmd
+00000526 w .text 00000000 EXTI15_10_IRQHandler
+00000b6a g F .text 00000012 TIM_ITConfig
+00000526 w .text 00000000 ADC_IRQHandler
+200000a4 g O .bss 00000004 OPA_Trim
+00000526 w .text 00000000 DMA1_Channel8_IRQHandler
+00001e16 g F .text 00000028 _close_r
20000000 g .dalign 00000000 _data_vma
-00000d04 g F .text 000000fc __swsetup_r
-0000040a w .text 00000000 EXTI9_5_IRQHandler
-000010b0 g F .text 0000009c __sfp
+00000f66 g F .text 000000fc __swsetup_r
+00000526 w .text 00000000 EXTI9_5_IRQHandler
+00001312 g F .text 0000009c __sfp
00000148 g F .text 00000028 .hidden __riscv_save_10
-00001adc g F .text 0000002c __sread
-00001c72 g F .text 00000002 __malloc_lock
+00001d3e g F .text 0000002c __sread
+00001ed4 g F .text 00000002 __malloc_lock
0000018a g F .text 00000016 .hidden __riscv_restore_4
00000180 g F .text 00000020 .hidden __riscv_restore_8
-00000f30 g F .text 00000064 _fflush_r
+00001192 g F .text 00000064 _fflush_r
00000156 g F .text 0000001a .hidden __riscv_save_6
-0000040a w .text 00000000 SPI2_IRQHandler
-00001d3c g O .text 00000020 __sf_fake_stdin
+00000526 w .text 00000000 SPI2_IRQHandler
+00001f9c g O .text 00000020 __sf_fake_stdin
000001a0 g F .text 000000a8 memset
00000180 g F .text 00000020 .hidden __riscv_restore_9
0000018a g F .text 00000016 .hidden __riscv_restore_7
-0000025a g F .text 00000052 main
-00001b80 g F .text 00000006 __sclose
-00001346 g F .text 000000d4 _malloc_r
-0000040a w .text 00000000 DMA1_Channel5_IRQHandler
-0000040a w .text 00000000 EXTI4_IRQHandler
-00000a42 g F .text 00000036 Delay_Ms
-0000040a w .text 00000000 USB_LP_CAN1_RX0_IRQHandler
-000002ac g F .text 000000ba SystemInit
-00000b2a g F .text 00000040 iprintf
-0000040a w .text 00000000 USB_HP_CAN1_TX_IRQHandler
+00000342 g F .text 0000006a main
+00001de2 g F .text 00000006 __sclose
+000015a8 g F .text 000000d4 _malloc_r
+00000526 w .text 00000000 DMA1_Channel5_IRQHandler
+00000526 w .text 00000000 EXTI4_IRQHandler
+00000ca2 g F .text 00000036 Delay_Ms
+00000526 w .text 00000000 USB_LP_CAN1_RX0_IRQHandler
+000003ac g F .text 000000d6 SystemInit
+00000d8c g F .text 00000040 iprintf
+00000526 w .text 00000000 USB_HP_CAN1_TX_IRQHandler
00000000 g .init 00000000 _sinit
-0000040a w .text 00000000 CMPWakeUp_IRQHandler
-00001b86 g F .text 0000002e _write_r
-0000040a w .text 00000000 DMA1_Channel3_IRQHandler
-00001706 g F .text 0000010c _printf_common
+00000526 w .text 00000000 CMPWakeUp_IRQHandler
+00001de8 g F .text 0000002e _write_r
+00000526 w .text 00000000 DMA1_Channel3_IRQHandler
+00001968 g F .text 0000010c _printf_common
2000008c g O .data 00000004 _impure_ptr
-0000040a w .text 00000000 TIM1_UP_IRQHandler
-00000e00 g F .text 00000130 __sflush_r
-0000040a w .text 00000000 LPTIMWakeUp_IRQHandler
-0000040a w .text 00000000 WWDG_IRQHandler
-0000040a w .text 00000000 Ecall_U_Mode_Handler
-0000040a w .text 00000000 TIM2_IRQHandler
+00000526 w .text 00000000 TIM1_UP_IRQHandler
+00001062 g F .text 00000130 __sflush_r
+00000526 w .text 00000000 LPTIMWakeUp_IRQHandler
+00000526 w .text 00000000 WWDG_IRQHandler
+00000526 w .text 00000000 Ecall_U_Mode_Handler
+000002d4 g F .text 0000005c TIM2_IRQHandler
20005000 g .stack 00000000 _eusrstack
00000170 g F .text 0000000c .hidden __riscv_save_2
-0000040a w .text 00000000 SW_Handler
-0000040a w .text 00000000 TIM1_BRK_IRQHandler
-000011b6 g F .text 00000058 __swhatbuf_r
-00000a10 g F .text 00000008 USART_SendData
-0000040a w .text 00000000 OPA_IRQHandler
-0000040a w .text 00000000 EXTI1_IRQHandler
+00000526 w .text 00000000 SW_Handler
+00000526 w .text 00000000 TIM1_BRK_IRQHandler
+00001418 g F .text 00000058 __swhatbuf_r
+00000c70 g F .text 00000008 USART_SendData
+00000526 w .text 00000000 OPA_IRQHandler
+00000526 w .text 00000000 EXTI1_IRQHandler
00000156 g F .text 0000001a .hidden __riscv_save_5
-00000aca g F .text 0000003a _write
+00000d2c g F .text 0000003a _write
20000098 g .data 00000000 _edata
-200000c0 g .bss 00000000 _end
-0000040a w .text 00000000 RTCAlarm_IRQHandler
-00001db8 g .dlalign 00000000 _data_lma
-0000040a w .text 00000000 USART2_IRQHandler
-00001b08 g F .text 00000048 __swrite
-00001482 g F .text 00000284 _vfiprintf_r
-0000114c g F .text 0000006a _fwalk_reent
-00000366 g F .text 000000a4 SystemCoreClockUpdate
-0000040a w .text 00000000 I2C2_ER_IRQHandler
-0000040a w .text 00000000 DMA1_Channel2_IRQHandler
-00001d5c g O .text 00000020 __sf_fake_stdout
+200000c4 g .bss 00000000 _end
+00000adc g F .text 00000076 TIM_TimeBaseInit
+00000526 w .text 00000000 RTCAlarm_IRQHandler
+00002018 g .dlalign 00000000 _data_lma
+00000526 w .text 00000000 USART2_IRQHandler
+00001d6a g F .text 00000048 __swrite
+000016e4 g F .text 00000284 _vfiprintf_r
+000013ae g F .text 0000006a _fwalk_reent
+00000482 g F .text 000000a4 SystemCoreClockUpdate
+00000526 w .text 00000000 I2C2_ER_IRQHandler
+00000526 w .text 00000000 DMA1_Channel2_IRQHandler
+00001fbc g O .text 00000020 __sf_fake_stdout
20000000 g O .data 00000010 HBPrescTable
0000017c g F .text 00000024 .hidden __riscv_restore_12
-00001cd2 g F .text 0000000c _read
-0000040c w .text 00000000 handle_reset
-0000040a w .text 00000000 CAN1_SCE_IRQHandler
+00001f34 g F .text 0000000c _read
+00000528 w .text 00000000 handle_reset
+00000526 w .text 00000000 CAN1_SCE_IRQHandler
+00000526 w .text 00000000 FLASH_IRQHandler
00000170 g F .text 0000000c .hidden __riscv_save_0
-0000040a w .text 00000000 FLASH_IRQHandler
-0000040a w .text 00000000 USBFSWakeUp_IRQHandler
-0000040a w .text 00000000 USART1_IRQHandler
-0000120e g F .text 00000090 __smakebuf_r
-00001812 g F .text 000002a0 _printf_i
-200000b8 g O .bss 00000004 __malloc_sbrk_start
-0000040a w .text 00000000 I2C1_ER_IRQHandler
-00000846 g F .text 00000006 NVIC_PriorityGroupConfig
-200000b4 g O .bss 00000004 __malloc_free_list
+00000526 w .text 00000000 USBFSWakeUp_IRQHandler
+00000526 w .text 00000000 USART1_IRQHandler
+00001470 g F .text 00000090 __smakebuf_r
+00001a74 g F .text 000002a0 _printf_i
+200000bc g O .bss 00000004 __malloc_sbrk_start
+00000526 w .text 00000000 I2C1_ER_IRQHandler
+00000970 g F .text 00000006 NVIC_PriorityGroupConfig
+200000b8 g O .bss 00000004 __malloc_free_list
00000194 g F .text 0000000c .hidden __riscv_restore_1
-00001482 g F .text 00000284 _vfprintf_r
-00001ca2 g F .text 0000000c _close
+000016e4 g F .text 00000284 _vfprintf_r
+00000280 g F .text 00000054 all_tim_Init
+00001f04 g F .text 0000000c _close
Disassembly of section .init:
00000000 <_sinit>:
- 0: 40c0006f j 40c
+ 0: 5280006f j 528
Disassembly of section .vector:
00000004 <_vector_base>:
...
- c: 0248 addi a0,sp,260
+ c: 0330 addi a2,sp,392
e: 0000 unimp
- 10: 024a slli tp,tp,0x12
+ 10: 0332 slli t1,t1,0xc
12: 0000 unimp
14: 0000 unimp
16: 0000 unimp
- 18: 040a slli s0,s0,0x2
+ 18: 0526 slli a0,a0,0x9
...
22: 0000 unimp
- 24: 040a slli s0,s0,0x2
+ 24: 0526 slli a0,a0,0x9
26: 0000 unimp
- 28: 040a slli s0,s0,0x2
+ 28: 0526 slli a0,a0,0x9
...
32: 0000 unimp
- 34: 040a slli s0,s0,0x2
+ 34: 0526 slli a0,a0,0x9
36: 0000 unimp
38: 0000 unimp
3a: 0000 unimp
- 3c: 040a slli s0,s0,0x2
+ 3c: 0526 slli a0,a0,0x9
3e: 0000 unimp
40: 0000 unimp
42: 0000 unimp
- 44: 040a slli s0,s0,0x2
+ 44: 0526 slli a0,a0,0x9
46: 0000 unimp
- 48: 040a slli s0,s0,0x2
+ 48: 0526 slli a0,a0,0x9
4a: 0000 unimp
- 4c: 040a slli s0,s0,0x2
+ 4c: 0526 slli a0,a0,0x9
4e: 0000 unimp
- 50: 040a slli s0,s0,0x2
+ 50: 0526 slli a0,a0,0x9
52: 0000 unimp
- 54: 040a slli s0,s0,0x2
+ 54: 0526 slli a0,a0,0x9
56: 0000 unimp
- 58: 040a slli s0,s0,0x2
+ 58: 0526 slli a0,a0,0x9
5a: 0000 unimp
- 5c: 040a slli s0,s0,0x2
+ 5c: 0526 slli a0,a0,0x9
5e: 0000 unimp
- 60: 040a slli s0,s0,0x2
+ 60: 0526 slli a0,a0,0x9
62: 0000 unimp
- 64: 040a slli s0,s0,0x2
+ 64: 0526 slli a0,a0,0x9
66: 0000 unimp
- 68: 040a slli s0,s0,0x2
+ 68: 0526 slli a0,a0,0x9
6a: 0000 unimp
- 6c: 040a slli s0,s0,0x2
+ 6c: 0526 slli a0,a0,0x9
6e: 0000 unimp
- 70: 040a slli s0,s0,0x2
+ 70: 0526 slli a0,a0,0x9
72: 0000 unimp
- 74: 040a slli s0,s0,0x2
+ 74: 0526 slli a0,a0,0x9
76: 0000 unimp
- 78: 040a slli s0,s0,0x2
+ 78: 0526 slli a0,a0,0x9
7a: 0000 unimp
- 7c: 040a slli s0,s0,0x2
+ 7c: 0526 slli a0,a0,0x9
7e: 0000 unimp
- 80: 040a slli s0,s0,0x2
+ 80: 0526 slli a0,a0,0x9
82: 0000 unimp
- 84: 040a slli s0,s0,0x2
+ 84: 0526 slli a0,a0,0x9
86: 0000 unimp
- 88: 040a slli s0,s0,0x2
+ 88: 0526 slli a0,a0,0x9
8a: 0000 unimp
- 8c: 040a slli s0,s0,0x2
+ 8c: 0526 slli a0,a0,0x9
8e: 0000 unimp
- 90: 040a slli s0,s0,0x2
+ 90: 0526 slli a0,a0,0x9
92: 0000 unimp
- 94: 040a slli s0,s0,0x2
+ 94: 0526 slli a0,a0,0x9
96: 0000 unimp
- 98: 040a slli s0,s0,0x2
+ 98: 0526 slli a0,a0,0x9
9a: 0000 unimp
- 9c: 040a slli s0,s0,0x2
+ 9c: 0526 slli a0,a0,0x9
9e: 0000 unimp
- a0: 040a slli s0,s0,0x2
+ a0: 0526 slli a0,a0,0x9
a2: 0000 unimp
- a4: 040a slli s0,s0,0x2
+ a4: 0526 slli a0,a0,0x9
a6: 0000 unimp
- a8: 040a slli s0,s0,0x2
+ a8: 0526 slli a0,a0,0x9
aa: 0000 unimp
- ac: 040a slli s0,s0,0x2
+ ac: 0526 slli a0,a0,0x9
ae: 0000 unimp
- b0: 040a slli s0,s0,0x2
+ b0: 0526 slli a0,a0,0x9
b2: 0000 unimp
- b4: 040a slli s0,s0,0x2
+ b4: 02d4 addi a3,sp,324
b6: 0000 unimp
- b8: 040a slli s0,s0,0x2
+ b8: 0526 slli a0,a0,0x9
ba: 0000 unimp
- bc: 040a slli s0,s0,0x2
+ bc: 0526 slli a0,a0,0x9
be: 0000 unimp
- c0: 040a slli s0,s0,0x2
+ c0: 0526 slli a0,a0,0x9
c2: 0000 unimp
- c4: 040a slli s0,s0,0x2
+ c4: 0526 slli a0,a0,0x9
c6: 0000 unimp
- c8: 040a slli s0,s0,0x2
+ c8: 0526 slli a0,a0,0x9
ca: 0000 unimp
- cc: 040a slli s0,s0,0x2
+ cc: 0526 slli a0,a0,0x9
ce: 0000 unimp
- d0: 040a slli s0,s0,0x2
+ d0: 0526 slli a0,a0,0x9
d2: 0000 unimp
- d4: 040a slli s0,s0,0x2
+ d4: 0526 slli a0,a0,0x9
d6: 0000 unimp
- d8: 040a slli s0,s0,0x2
+ d8: 0526 slli a0,a0,0x9
da: 0000 unimp
- dc: 040a slli s0,s0,0x2
+ dc: 0526 slli a0,a0,0x9
de: 0000 unimp
- e0: 040a slli s0,s0,0x2
+ e0: 0526 slli a0,a0,0x9
e2: 0000 unimp
- e4: 040a slli s0,s0,0x2
+ e4: 0526 slli a0,a0,0x9
e6: 0000 unimp
- e8: 040a slli s0,s0,0x2
+ e8: 0526 slli a0,a0,0x9
ea: 0000 unimp
- ec: 040a slli s0,s0,0x2
+ ec: 0526 slli a0,a0,0x9
ee: 0000 unimp
- f0: 040a slli s0,s0,0x2
+ f0: 0526 slli a0,a0,0x9
f2: 0000 unimp
- f4: 040a slli s0,s0,0x2
+ f4: 0526 slli a0,a0,0x9
f6: 0000 unimp
- f8: 040a slli s0,s0,0x2
+ f8: 0526 slli a0,a0,0x9
fa: 0000 unimp
- fc: 040a slli s0,s0,0x2
+ fc: 0526 slli a0,a0,0x9
fe: 0000 unimp
- 100: 040a slli s0,s0,0x2
+ 100: 0526 slli a0,a0,0x9
102: 0000 unimp
- 104: 040a slli s0,s0,0x2
+ 104: 0526 slli a0,a0,0x9
106: 0000 unimp
- 108: 040a slli s0,s0,0x2
+ 108: 0526 slli a0,a0,0x9
10a: 0000 unimp
10c: 0000 unimp
10e: 0000 unimp
- 110: 040a slli s0,s0,0x2
+ 110: 0526 slli a0,a0,0x9
112: 0000 unimp
- 114: 040a slli s0,s0,0x2
+ 114: 0526 slli a0,a0,0x9
...
Disassembly of section .text:
@@ -563,2749 +584,3008 @@ Disassembly of section .text:
242: f8c374e3 bgeu t1,a2,1ca
246: b7a5 j 1ae
-00000248 :
- 248: a001 j 248
+00000248 :
+ 248: f29ff2ef jal t0,170 <__riscv_save_0>
+ 24c: 1141 addi sp,sp,-16
+ 24e: 4585 li a1,1
+ 250: 4541 li a0,16
+ 252: 04f000ef jal ra,aa0
+ 256: 6789 lui a5,0x2
+ 258: 827c sh a5,4(sp)
+ 25a: 47c1 li a5,16
+ 25c: c63e sw a5,12(sp)
+ 25e: 004c addi a1,sp,4
+ 260: 478d li a5,3
+ 262: 40011537 lui a0,0x40011
+ 266: c43e sw a5,8(sp)
+ 268: 26b1 jal 5b4
+ 26a: 6589 lui a1,0x2
+ 26c: 40011537 lui a0,0x40011
+ 270: 2111 jal 674
+ 272: 0141 addi sp,sp,16
+ 274: b705 j 194 <__riscv_restore_0>
-0000024a :
- 24a: beef07b7 lui a5,0xbeef0
- 24e: e000e737 lui a4,0xe000e
- 252: 08078793 addi a5,a5,128 # beef0080 <_eusrstack+0x9eeeb080>
- 256: c73c sw a5,72(a4)
- 258: a001 j 258
+00000276 :
+ 276: efbff2ef jal t0,170 <__riscv_save_0>
+ 27a: 37f9 jal 248
+ 27c: 2011 jal 280
+ 27e: bf19 j 194 <__riscv_restore_0>
-0000025a :
- 25a: f17ff2ef jal t0,170 <__riscv_save_0>
- 25e: 4505 li a0,1
- 260: 23dd jal 846
- 262: 2211 jal 366
- 264: 7be000ef jal ra,a22
- 268: 6571 lui a0,0x1c
- 26a: 20050513 addi a0,a0,512 # 1c200 <_data_lma+0x1a448>
- 26e: 00b000ef jal ra,a78
- 272: 200007b7 lui a5,0x20000
- 276: 0807a583 lw a1,128(a5) # 20000080
- 27a: 00002537 lui a0,0x2
- 27e: ce050513 addi a0,a0,-800 # 1ce0 <_read+0xe>
- 282: 0a9000ef jal ra,b2a
- 286: 2431 jal 492
- 288: 85aa mv a1,a0
- 28a: 00002537 lui a0,0x2
- 28e: cf050513 addi a0,a0,-784 # 1cf0 <_read+0x1e>
- 292: 099000ef jal ra,b2a
- 296: 00002437 lui s0,0x2
- 29a: 3e800513 li a0,1000
- 29e: 7a4000ef jal ra,a42
- 2a2: d0040513 addi a0,s0,-768 # 1d00 <_read+0x2e>
- 2a6: 199000ef jal ra,c3e
- 2aa: bfc5 j 29a
+00000280 :
+ 280: ef1ff2ef jal t0,170 <__riscv_save_0>
+ 284: 1101 addi sp,sp,-32
+ 286: 4585 li a1,1
+ 288: 4505 li a0,1
+ 28a: 035000ef jal ra,abe
+ 28e: 6785 lui a5,0x1
+ 290: 38778793 addi a5,a5,903 # 1387 <__sfp+0x75>
+ 294: ca3e sw a5,20(sp)
+ 296: 084c addi a1,sp,20
+ 298: 479d li a5,7
+ 29a: 40000537 lui a0,0x40000
+ 29e: cc3e sw a5,24(sp)
+ 2a0: 00011e23 sh zero,28(sp)
+ 2a4: 039000ef jal ra,adc
+ 2a8: 4605 li a2,1
+ 2aa: 4585 li a1,1
+ 2ac: 40000537 lui a0,0x40000
+ 2b0: 0bb000ef jal ra,b6a
+ 2b4: 02c00793 li a5,44
+ 2b8: 867c sh a5,12(sp)
+ 2ba: 478d li a5,3
+ 2bc: 875c sb a5,14(sp)
+ 2be: 0068 addi a0,sp,12
+ 2c0: 4785 li a5,1
+ 2c2: c83e sw a5,16(sp)
+ 2c4: 2d4d jal 976
+ 2c6: 4585 li a1,1
+ 2c8: 40000537 lui a0,0x40000
+ 2cc: 087000ef jal ra,b52
+ 2d0: 6105 addi sp,sp,32
+ 2d2: b5c9 j 194 <__riscv_restore_0>
-000002ac :
- 2ac: ec5ff2ef jal t0,170 <__riscv_save_0>
- 2b0: 40021437 lui s0,0x40021
- 2b4: 401c lw a5,0(s0)
- 2b6: 08ff0737 lui a4,0x8ff0
- 2ba: 0017e793 ori a5,a5,1
- 2be: c01c sw a5,0(s0)
- 2c0: 405c lw a5,4(s0)
- 2c2: 8ff9 and a5,a5,a4
- 2c4: c05c sw a5,4(s0)
- 2c6: 401c lw a5,0(s0)
- 2c8: fef70737 lui a4,0xfef70
- 2cc: 176d addi a4,a4,-5
- 2ce: 8ff9 and a5,a5,a4
- 2d0: c01c sw a5,0(s0)
- 2d2: 401c lw a5,0(s0)
- 2d4: fffc0737 lui a4,0xfffc0
- 2d8: 177d addi a4,a4,-1
- 2da: 8ff9 and a5,a5,a4
- 2dc: c01c sw a5,0(s0)
- 2de: 405c lw a5,4(s0)
- 2e0: ff010737 lui a4,0xff010
- 2e4: 177d addi a4,a4,-1
- 2e6: 8ff9 and a5,a5,a4
- 2e8: c05c sw a5,4(s0)
- 2ea: 009f07b7 lui a5,0x9f0
- 2ee: c41c sw a5,8(s0)
- 2f0: 2e51 jal 684
- 2f2: 400227b7 lui a5,0x40022
- 2f6: 4709 li a4,2
- 2f8: c398 sw a4,0(a5)
- 2fa: 40024737 lui a4,0x40024
- 2fe: 80072783 lw a5,-2048(a4) # 40023800 <_eusrstack+0x2001e800>
- 302: 0107e793 ori a5,a5,16
- 306: 80f72023 sw a5,-2048(a4)
- 30a: 405c lw a5,4(s0)
- 30c: ffc10737 lui a4,0xffc10
- 310: 177d addi a4,a4,-1
- 312: c05c sw a5,4(s0)
- 314: 405c lw a5,4(s0)
- 316: c05c sw a5,4(s0)
- 318: 405c lw a5,4(s0)
- 31a: 4007e793 ori a5,a5,1024
- 31e: c05c sw a5,4(s0)
- 320: 405c lw a5,4(s0)
- 322: 8ff9 and a5,a5,a4
- 324: c05c sw a5,4(s0)
- 326: 405c lw a5,4(s0)
- 328: 00280737 lui a4,0x280
- 32c: 8fd9 or a5,a5,a4
- 32e: c05c sw a5,4(s0)
- 330: 401c lw a5,0(s0)
- 332: 01000737 lui a4,0x1000
- 336: 8fd9 or a5,a5,a4
- 338: c01c sw a5,0(s0)
- 33a: 400217b7 lui a5,0x40021
- 33e: 4398 lw a4,0(a5)
- 340: 00671693 slli a3,a4,0x6
- 344: fe06dde3 bgez a3,33e
- 348: 43d8 lw a4,4(a5)
- 34a: 400216b7 lui a3,0x40021
- 34e: 9b71 andi a4,a4,-4
- 350: c3d8 sw a4,4(a5)
- 352: 43d8 lw a4,4(a5)
- 354: 00276713 ori a4,a4,2
- 358: c3d8 sw a4,4(a5)
- 35a: 4721 li a4,8
- 35c: 42dc lw a5,4(a3)
- 35e: 8bb1 andi a5,a5,12
- 360: fee79ee3 bne a5,a4,35c
- 364: bd05 j 194 <__riscv_restore_0>
+000002d4 :
+ 2d4: 4585 li a1,1
+ 2d6: 40000537 lui a0,0x40000
+ 2da: 0a3000ef jal ra,b7c
+ 2de: c539 beqz a0,32c
+ 2e0: 81918593 addi a1,gp,-2023 # 20000099
+ 2e4: 81818693 addi a3,gp,-2024 # 20000098 <_edata>
+ 2e8: 219c lbu a5,0(a1)
+ 2ea: 2298 lbu a4,0(a3)
+ 2ec: 81918613 addi a2,gp,-2023 # 20000099
+ 2f0: 0785 addi a5,a5,1
+ 2f2: 0705 addi a4,a4,1
+ 2f4: 0ff77713 andi a4,a4,255
+ 2f8: 0ff7f793 andi a5,a5,255
+ 2fc: a19c sb a5,0(a1)
+ 2fe: a298 sb a4,0(a3)
+ 300: 45a5 li a1,9
+ 302: 00e5f763 bgeu a1,a4,310
+ 306: 00068023 sb zero,0(a3)
+ 30a: 4685 li a3,1
+ 30c: 80d18da3 sb a3,-2021(gp) # 2000009b
+ 310: 0c700713 li a4,199
+ 314: 00f77763 bgeu a4,a5,322
+ 318: 4705 li a4,1
+ 31a: 00060023 sb zero,0(a2)
+ 31e: 80e18d23 sb a4,-2022(gp) # 2000009a
+ 322: 4585 li a1,1
+ 324: 40000537 lui a0,0x40000
+ 328: 06d000ef jal ra,b94
+ 32c: 30200073 mret
-00000366 :
- 366: 400216b7 lui a3,0x40021
- 36a: 42dc lw a5,4(a3)
- 36c: 20000737 lui a4,0x20000
- 370: 4611 li a2,4
- 372: 8bb1 andi a5,a5,12
- 374: 08070713 addi a4,a4,128 # 20000080
- 378: 02c78f63 beq a5,a2,3b6
- 37c: 4621 li a2,8
- 37e: 04c78163 beq a5,a2,3c0
- 382: eb95 bnez a5,3b6
- 384: 429c lw a5,0(a3)
- 386: 8b91 andi a5,a5,4
- 388: c79d beqz a5,3b6
- 38a: 000f47b7 lui a5,0xf4
- 38e: 24078793 addi a5,a5,576 # f4240 <_data_lma+0xf2488>
- 392: c31c sw a5,0(a4)
- 394: 400217b7 lui a5,0x40021
- 398: 43dc lw a5,4(a5)
- 39a: 8391 srli a5,a5,0x4
- 39c: 00f7f693 andi a3,a5,15
- 3a0: 200007b7 lui a5,0x20000
- 3a4: 00078793 mv a5,a5
- 3a8: 97b6 add a5,a5,a3
- 3aa: 2394 lbu a3,0(a5)
- 3ac: 431c lw a5,0(a4)
- 3ae: 00d7d7b3 srl a5,a5,a3
- 3b2: c31c sw a5,0(a4)
- 3b4: 8082 ret
- 3b6: 007a17b7 lui a5,0x7a1
- 3ba: 20078793 addi a5,a5,512 # 7a1200 <_data_lma+0x79f448>
- 3be: bfd1 j 392
- 3c0: 42dc lw a5,4(a3)
- 3c2: 42d4 lw a3,4(a3)
- 3c4: 6641 lui a2,0x10
- 3c6: 83c9 srli a5,a5,0x12
- 3c8: 8bbd andi a5,a5,15
- 3ca: 8ef1 and a3,a3,a2
- 3cc: 0789 addi a5,a5,2
- 3ce: 4645 li a2,17
- 3d0: 00c79363 bne a5,a2,3d6
- 3d4: 47c9 li a5,18
- 3d6: ee81 bnez a3,3ee
- 3d8: 400246b7 lui a3,0x40024
- 3dc: 8006a683 lw a3,-2048(a3) # 40023800 <_eusrstack+0x2001e800>
- 3e0: 8ac1 andi a3,a3,16
- 3e2: ce89 beqz a3,3fc
- 3e4: 007a16b7 lui a3,0x7a1
- 3e8: 20068693 addi a3,a3,512 # 7a1200 <_data_lma+0x79f448>
- 3ec: a821 j 404
- 3ee: 400216b7 lui a3,0x40021
- 3f2: 42d4 lw a3,4(a3)
- 3f4: 00e69613 slli a2,a3,0xe
- 3f8: fe0656e3 bgez a2,3e4
- 3fc: 003d16b7 lui a3,0x3d1
- 400: 90068693 addi a3,a3,-1792 # 3d0900 <_data_lma+0x3ceb48>
- 404: 02d787b3 mul a5,a5,a3
- 408: b769 j 392
+00000330 :
+ 330: a001 j 330
-0000040a :
- 40a: a001 j 40a
+00000332 :
+ 332: beef07b7 lui a5,0xbeef0
+ 336: e000e737 lui a4,0xe000e
+ 33a: 08078793 addi a5,a5,128 # beef0080 <_eusrstack+0x9eeeb080>
+ 33e: c73c sw a5,72(a4)
+ 340: a001 j 340
-0000040c :
- 40c: 20000197 auipc gp,0x20000
- 410: 47418193 addi gp,gp,1140 # 20000880 <__global_pointer$>
- 414: 20005117 auipc sp,0x20005
- 418: bec10113 addi sp,sp,-1044 # 20005000 <_eusrstack>
- 41c: 00002517 auipc a0,0x2
- 420: 99c50513 addi a0,a0,-1636 # 1db8 <_data_lma>
- 424: 20000597 auipc a1,0x20000
- 428: bdc58593 addi a1,a1,-1060 # 20000000 <_data_vma>
- 42c: 81818613 addi a2,gp,-2024 # 20000098 <_edata>
- 430: 00c5fa63 bgeu a1,a2,444
- 434: 00052283 lw t0,0(a0)
- 438: 0055a023 sw t0,0(a1)
- 43c: 0511 addi a0,a0,4
- 43e: 0591 addi a1,a1,4
- 440: fec5eae3 bltu a1,a2,434
- 444: 81818513 addi a0,gp,-2024 # 20000098 <_edata>
- 448: 84018593 addi a1,gp,-1984 # 200000c0 <_ebss>
- 44c: 00b57763 bgeu a0,a1,45a
- 450: 00052023 sw zero,0(a0)
- 454: 0511 addi a0,a0,4
- 456: feb56de3 bltu a0,a1,450
- 45a: 42fd li t0,31
- 45c: bc029073 csrw 0xbc0,t0
- 460: 428d li t0,3
- 462: 80429073 csrw 0x804,t0
- 466: 08800293 li t0,136
- 46a: 30029073 csrw mstatus,t0
- 46e: 00000297 auipc t0,0x0
- 472: b9628293 addi t0,t0,-1130 # 4 <_einit>
- 476: 0032e293 ori t0,t0,3
- 47a: 30529073 csrw mtvec,t0
- 47e: e2fff0ef jal ra,2ac
- 482: 00000297 auipc t0,0x0
- 486: dd828293 addi t0,t0,-552 # 25a
- 48a: 34129073 csrw mepc,t0
- 48e: 30200073 mret
+00000342 :
+ 342: e2fff2ef jal t0,170 <__riscv_save_0>
+ 346: 4505 li a0,1
+ 348: 2525 jal 970
+ 34a: 2a25 jal 482
+ 34c: 137000ef jal ra,c82
+ 350: 6571 lui a0,0x1c
+ 352: 20050513 addi a0,a0,512 # 1c200 <_data_lma+0x1a1e8>
+ 356: 183000ef jal ra,cd8
+ 35a: 3f31 jal 276
+ 35c: 200007b7 lui a5,0x20000
+ 360: 0807a583 lw a1,128(a5) # 20000080
+ 364: 00002537 lui a0,0x2
+ 368: f4050513 addi a0,a0,-192 # 1f40 <_read+0xc>
+ 36c: 221000ef jal ra,d8c
+ 370: 2c3d jal 5ae
+ 372: 85aa mv a1,a0
+ 374: 00002537 lui a0,0x2
+ 378: f5050513 addi a0,a0,-176 # 1f50 <_read+0x1c>
+ 37c: 211000ef jal ra,d8c
+ 380: 4405 li s0,1
+ 382: 000024b7 lui s1,0x2
+ 386: 3e800513 li a0,1000
+ 38a: 119000ef jal ra,ca2
+ 38e: cc01 beqz s0,3a6
+ 390: 4601 li a2,0
+ 392: 4401 li s0,0
+ 394: 6589 lui a1,0x2
+ 396: 40011537 lui a0,0x40011
+ 39a: 2cf9 jal 678
+ 39c: f6048513 addi a0,s1,-160 # 1f60 <_read+0x2c>
+ 3a0: 301000ef jal ra,ea0
+ 3a4: b7cd j 386
+ 3a6: 4605 li a2,1
+ 3a8: 4405 li s0,1
+ 3aa: b7ed j 394
-00000492 :
- 492: 81c1a503 lw a0,-2020(gp) # 2000009c
- 496: 8082 ret
+000003ac :
+ 3ac: dc5ff2ef jal t0,170 <__riscv_save_0>
+ 3b0: 40021437 lui s0,0x40021
+ 3b4: 401c lw a5,0(s0)
+ 3b6: 08ff0737 lui a4,0x8ff0
+ 3ba: 1141 addi sp,sp,-16
+ 3bc: 0017e793 ori a5,a5,1
+ 3c0: c01c sw a5,0(s0)
+ 3c2: 405c lw a5,4(s0)
+ 3c4: 8ff9 and a5,a5,a4
+ 3c6: c05c sw a5,4(s0)
+ 3c8: 401c lw a5,0(s0)
+ 3ca: fef70737 lui a4,0xfef70
+ 3ce: 176d addi a4,a4,-5
+ 3d0: 8ff9 and a5,a5,a4
+ 3d2: c01c sw a5,0(s0)
+ 3d4: 401c lw a5,0(s0)
+ 3d6: fffc0737 lui a4,0xfffc0
+ 3da: 177d addi a4,a4,-1
+ 3dc: 8ff9 and a5,a5,a4
+ 3de: c01c sw a5,0(s0)
+ 3e0: 405c lw a5,4(s0)
+ 3e2: ff010737 lui a4,0xff010
+ 3e6: 177d addi a4,a4,-1
+ 3e8: 8ff9 and a5,a5,a4
+ 3ea: c05c sw a5,4(s0)
+ 3ec: 009f07b7 lui a5,0x9f0
+ 3f0: c41c sw a5,8(s0)
+ 3f2: 2e75 jal 7ae
+ 3f4: c402 sw zero,8(sp)
+ 3f6: c602 sw zero,12(sp)
+ 3f8: 400227b7 lui a5,0x40022
+ 3fc: 0007a023 sw zero,0(a5) # 40022000 <_eusrstack+0x2001d000>
+ 400: 401c lw a5,0(s0)
+ 402: 6741 lui a4,0x10
+ 404: 400216b7 lui a3,0x40021
+ 408: 8fd9 or a5,a5,a4
+ 40a: c01c sw a5,0(s0)
+ 40c: 00020637 lui a2,0x20
+ 410: 6705 lui a4,0x1
+ 412: 429c lw a5,0(a3)
+ 414: 8ff1 and a5,a5,a2
+ 416: c63e sw a5,12(sp)
+ 418: 47a2 lw a5,8(sp)
+ 41a: 0785 addi a5,a5,1
+ 41c: c43e sw a5,8(sp)
+ 41e: 47b2 lw a5,12(sp)
+ 420: e781 bnez a5,428
+ 422: 47a2 lw a5,8(sp)
+ 424: fee797e3 bne a5,a4,412
+ 428: 400217b7 lui a5,0x40021
+ 42c: 439c lw a5,0(a5)
+ 42e: 00e79713 slli a4,a5,0xe
+ 432: 04075063 bgez a4,472
+ 436: 4785 li a5,1
+ 438: c63e sw a5,12(sp)
+ 43a: 4732 lw a4,12(sp)
+ 43c: 4785 li a5,1
+ 43e: 02f71c63 bne a4,a5,476
+ 442: 400217b7 lui a5,0x40021
+ 446: 43d8 lw a4,4(a5)
+ 448: 400216b7 lui a3,0x40021
+ 44c: c3d8 sw a4,4(a5)
+ 44e: 43d8 lw a4,4(a5)
+ 450: c3d8 sw a4,4(a5)
+ 452: 43d8 lw a4,4(a5)
+ 454: c3d8 sw a4,4(a5)
+ 456: 43d8 lw a4,4(a5)
+ 458: 9b71 andi a4,a4,-4
+ 45a: c3d8 sw a4,4(a5)
+ 45c: 43d8 lw a4,4(a5)
+ 45e: 00176713 ori a4,a4,1
+ 462: c3d8 sw a4,4(a5)
+ 464: 4711 li a4,4
+ 466: 42dc lw a5,4(a3)
+ 468: 8bb1 andi a5,a5,12
+ 46a: fee79ee3 bne a5,a4,466
+ 46e: 0141 addi sp,sp,16
+ 470: b315 j 194 <__riscv_restore_0>
+ 472: c602 sw zero,12(sp)
+ 474: b7d9 j 43a
+ 476: 40022737 lui a4,0x40022
+ 47a: 431c lw a5,0(a4)
+ 47c: 9bf1 andi a5,a5,-4
+ 47e: c31c sw a5,0(a4)
+ 480: b7fd j 46e
-00000498 :
- 498: 459c lw a5,8(a1)
- 49a: 0107f713 andi a4,a5,16
- 49e: 00f7f813 andi a6,a5,15
- 4a2: c701 beqz a4,4aa
- 4a4: 41d8 lw a4,4(a1)
- 4a6: 00e86833 or a6,a6,a4
- 4aa: 218e lhu a1,0(a1)
- 4ac: 0ff5f713 andi a4,a1,255
- 4b0: c339 beqz a4,4f6
- 4b2: 4118 lw a4,0(a0)
- 4b4: 4681 li a3,0
- 4b6: 4e85 li t4,1
- 4b8: 4f3d li t5,15
- 4ba: 02800f93 li t6,40
- 4be: 04800293 li t0,72
- 4c2: 4e21 li t3,8
- 4c4: 00de9633 sll a2,t4,a3
- 4c8: 00c5f8b3 and a7,a1,a2
- 4cc: 03161163 bne a2,a7,4ee
- 4d0: 00269893 slli a7,a3,0x2
- 4d4: 011f1333 sll t1,t5,a7
- 4d8: fff34313 not t1,t1
- 4dc: 00e37733 and a4,t1,a4
- 4e0: 011818b3 sll a7,a6,a7
- 4e4: 00e8e733 or a4,a7,a4
- 4e8: 05f79f63 bne a5,t6,546
- 4ec: c950 sw a2,20(a0)
- 4ee: 0685 addi a3,a3,1
- 4f0: fdc69ae3 bne a3,t3,4c4
- 4f4: c118 sw a4,0(a0)
- 4f6: 0ff00713 li a4,255
- 4fa: 04b77563 bgeu a4,a1,544
- 4fe: 4154 lw a3,4(a0)
- 500: 4621 li a2,8
- 502: 4e85 li t4,1
- 504: 4f3d li t5,15
- 506: 02800f93 li t6,40
- 50a: 04800293 li t0,72
- 50e: 4e41 li t3,16
- 510: 00ce98b3 sll a7,t4,a2
- 514: 0115f733 and a4,a1,a7
- 518: 02e89263 bne a7,a4,53c
- 51c: 00261713 slli a4,a2,0x2
- 520: 1701 addi a4,a4,-32
- 522: 00ef1333 sll t1,t5,a4
- 526: fff34313 not t1,t1
- 52a: 00d376b3 and a3,t1,a3
- 52e: 00e81733 sll a4,a6,a4
- 532: 8ed9 or a3,a3,a4
- 534: 01f79d63 bne a5,t6,54e
- 538: 01152a23 sw a7,20(a0)
- 53c: 0605 addi a2,a2,1
- 53e: fdc619e3 bne a2,t3,510
- 542: c154 sw a3,4(a0)
- 544: 8082 ret
- 546: fa5794e3 bne a5,t0,4ee
- 54a: c910 sw a2,16(a0)
- 54c: b74d j 4ee
- 54e: fe5797e3 bne a5,t0,53c
- 552: 01152823 sw a7,16(a0)
- 556: b7dd j 53c
+00000482 :
+ 482: 400216b7 lui a3,0x40021
+ 486: 42dc lw a5,4(a3)
+ 488: 20000737 lui a4,0x20000
+ 48c: 4611 li a2,4
+ 48e: 8bb1 andi a5,a5,12
+ 490: 08070713 addi a4,a4,128 # 20000080
+ 494: 02c78f63 beq a5,a2,4d2
+ 498: 4621 li a2,8
+ 49a: 04c78163 beq a5,a2,4dc
+ 49e: eb95 bnez a5,4d2
+ 4a0: 429c lw a5,0(a3)
+ 4a2: 8b91 andi a5,a5,4
+ 4a4: c79d beqz a5,4d2
+ 4a6: 000f47b7 lui a5,0xf4
+ 4aa: 24078793 addi a5,a5,576 # f4240 <_data_lma+0xf2228>
+ 4ae: c31c sw a5,0(a4)
+ 4b0: 400217b7 lui a5,0x40021
+ 4b4: 43dc lw a5,4(a5)
+ 4b6: 8391 srli a5,a5,0x4
+ 4b8: 00f7f693 andi a3,a5,15
+ 4bc: 200007b7 lui a5,0x20000
+ 4c0: 00078793 mv a5,a5
+ 4c4: 97b6 add a5,a5,a3
+ 4c6: 2394 lbu a3,0(a5)
+ 4c8: 431c lw a5,0(a4)
+ 4ca: 00d7d7b3 srl a5,a5,a3
+ 4ce: c31c sw a5,0(a4)
+ 4d0: 8082 ret
+ 4d2: 007a17b7 lui a5,0x7a1
+ 4d6: 20078793 addi a5,a5,512 # 7a1200 <_data_lma+0x79f1e8>
+ 4da: bfd1 j 4ae
+ 4dc: 42dc lw a5,4(a3)
+ 4de: 42d4 lw a3,4(a3)
+ 4e0: 6641 lui a2,0x10
+ 4e2: 83c9 srli a5,a5,0x12
+ 4e4: 8bbd andi a5,a5,15
+ 4e6: 8ef1 and a3,a3,a2
+ 4e8: 0789 addi a5,a5,2
+ 4ea: 4645 li a2,17
+ 4ec: 00c79363 bne a5,a2,4f2
+ 4f0: 47c9 li a5,18
+ 4f2: ee81 bnez a3,50a
+ 4f4: 400246b7 lui a3,0x40024
+ 4f8: 8006a683 lw a3,-2048(a3) # 40023800 <_eusrstack+0x2001e800>
+ 4fc: 8ac1 andi a3,a3,16
+ 4fe: ce89 beqz a3,518
+ 500: 007a16b7 lui a3,0x7a1
+ 504: 20068693 addi a3,a3,512 # 7a1200 <_data_lma+0x79f1e8>
+ 508: a821 j 520
+ 50a: 400216b7 lui a3,0x40021
+ 50e: 42d4 lw a3,4(a3)
+ 510: 00e69613 slli a2,a3,0xe
+ 514: fe0656e3 bgez a2,500
+ 518: 003d16b7 lui a3,0x3d1
+ 51c: 90068693 addi a3,a3,-1792 # 3d0900 <_data_lma+0x3ce8e8>
+ 520: 02d787b3 mul a5,a5,a3
+ 524: b769 j 4ae
-00000558 :
- 558: c0000737 lui a4,0xc0000
- 55c: 00e577b3 and a5,a0,a4
- 560: 08e79563 bne a5,a4,5ea
- 564: 40010737 lui a4,0x40010
- 568: 435c lw a5,4(a4)
- 56a: 01b55693 srli a3,a0,0x1b
- 56e: 4f58 lw a4,28(a4)
- 570: 8a9d andi a3,a3,7
- 572: e69d bnez a3,5a0
- 574: 9bf9 andi a5,a5,-2
- 576: ff0006b7 lui a3,0xff000
- 57a: 16fd addi a3,a3,-1
- 57c: 8f75 and a4,a4,a3
- 57e: c989 beqz a1,590
- 580: 01051693 slli a3,a0,0x10
- 584: 82c1 srli a3,a3,0x10
- 586: 8fd5 or a5,a5,a3
- 588: 01ff06b7 lui a3,0x1ff0
- 58c: 8d75 and a0,a0,a3
- 58e: 8f49 or a4,a4,a0
- 590: 070006b7 lui a3,0x7000
- 594: 8fd5 or a5,a5,a3
- 596: 400106b7 lui a3,0x40010
- 59a: c2dc sw a5,4(a3)
- 59c: ced8 sw a4,28(a3)
- 59e: 8082 ret
- 5a0: 4605 li a2,1
- 5a2: 00c69663 bne a3,a2,5ae
- 5a6: 9bf5 andi a5,a5,-3
- 5a8: ff8006b7 lui a3,0xff800
- 5ac: b7f9 j 57a
- 5ae: 4609 li a2,2
- 5b0: 00c69663 bne a3,a2,5bc
- 5b4: 9bed andi a5,a5,-5
- 5b6: ffe806b7 lui a3,0xffe80
- 5ba: b7c1 j 57a
- 5bc: 460d li a2,3
- 5be: 00c69663 bne a3,a2,5ca
- 5c2: 9bdd andi a5,a5,-9
- 5c4: fffc06b7 lui a3,0xfffc0
- 5c8: bf4d j 57a
- 5ca: 4611 li a2,4
- 5cc: 00c69763 bne a3,a2,5da
- 5d0: f3f7f793 andi a5,a5,-193
- 5d4: ffc006b7 lui a3,0xffc00
- 5d8: b74d j 57a
- 5da: 4615 li a2,5
- 5dc: fac691e3 bne a3,a2,57e
- 5e0: cff7f793 andi a5,a5,-769
- 5e4: ffe006b7 lui a3,0xffe00
- 5e8: bf49 j 57a
- 5ea: 40000737 lui a4,0x40000
- 5ee: 02e79163 bne a5,a4,610
- 5f2: 400107b7 lui a5,0x40010
- 5f6: 4fd8 lw a4,28(a5)
- 5f8: 0542 slli a0,a0,0x10
- 5fa: 00a767b3 or a5,a4,a0
- 5fe: e589 bnez a1,608
- 600: fff54513 not a0,a0
- 604: 00e577b3 and a5,a0,a4
- 608: 40010737 lui a4,0x40010
- 60c: cf5c sw a5,28(a4)
- 60e: 8082 ret
- 610: e3a9 bnez a5,652
- 612: 40010837 lui a6,0x40010
- 616: 003007b7 lui a5,0x300
- 61a: 00482603 lw a2,4(a6) # 40010004 <_eusrstack+0x2000b004>
- 61e: 01051713 slli a4,a0,0x10
- 622: 00f576b3 and a3,a0,a5
- 626: 8341 srli a4,a4,0x10
- 628: 02f69663 bne a3,a5,654
- 62c: f90006b7 lui a3,0xf9000
- 630: 16fd addi a3,a3,-1
- 632: 00d677b3 and a5,a2,a3
- 636: 00482603 lw a2,4(a6)
- 63a: 8ef1 and a3,a3,a2
- 63c: 00d82223 sw a3,4(a6)
- 640: c591 beqz a1,64c
- 642: 8155 srli a0,a0,0x15
- 644: 0512 slli a0,a0,0x4
- 646: 00a71533 sll a0,a4,a0
- 64a: 8fc9 or a5,a5,a0
- 64c: 40010737 lui a4,0x40010
- 650: c35c sw a5,4(a4)
- 652: 8082 ret
- 654: 00b51793 slli a5,a0,0xb
- 658: 0207d063 bgez a5,678
- 65c: 01055793 srli a5,a0,0x10
- 660: 00f7f693 andi a3,a5,15
- 664: 478d li a5,3
- 666: 00d797b3 sll a5,a5,a3
- 66a: fff7c793 not a5,a5
- 66e: 8ff1 and a5,a5,a2
- 670: 070006b7 lui a3,0x7000
- 674: 8fd5 or a5,a5,a3
- 676: b7e9 j 640
- 678: 01555793 srli a5,a0,0x15
- 67c: 0792 slli a5,a5,0x4
- 67e: 00f717b3 sll a5,a4,a5
- 682: b7e5 j 66a
+00000526 :
+ 526: a001 j 526
-00000684 :
- 684: aedff2ef jal t0,170 <__riscv_save_0>
- 688: 1ffff437 lui s0,0x1ffff
- 68c: 72442703 lw a4,1828(s0) # 1ffff724 <_data_lma+0x1fffd96c>
- 690: 3e000637 lui a2,0x3e000
- 694: 1141 addi sp,sp,-16
- 696: 01971793 slli a5,a4,0x19
- 69a: fff74693 not a3,a4
- 69e: 8ff1 and a5,a5,a2
- 6a0: 0706 slli a4,a4,0x1
- 6a2: 003e0637 lui a2,0x3e0
- 6a6: 8f71 and a4,a4,a2
- 6a8: 8fd9 or a5,a5,a4
- 6aa: 01000637 lui a2,0x1000
- 6ae: 00969713 slli a4,a3,0x9
- 6b2: 8f71 and a4,a4,a2
- 6b4: 8fd9 or a5,a5,a4
- 6b6: 82bd srli a3,a3,0xf
- 6b8: 6741 lui a4,0x10
- 6ba: 8ef9 and a3,a3,a4
- 6bc: c202 sw zero,4(sp)
- 6be: c402 sw zero,8(sp)
- 6c0: c602 sw zero,12(sp)
- 6c2: 8fd5 or a5,a5,a3
- 6c4: 82f1a023 sw a5,-2016(gp) # 200000a0
- 6c8: 72845703 lhu a4,1832(s0)
- 6cc: 4585 li a1,1
- 6ce: 80e19c23 sh a4,-2024(gp) # 20000098 <_edata>
- 6d2: 72042703 lw a4,1824(s0)
- 6d6: 03d00513 li a0,61
- 6da: 82e1a223 sw a4,-2012(gp) # 200000a4
- 6de: 70442703 lw a4,1796(s0)
- 6e2: 80e1ae23 sw a4,-2020(gp) # 2000009c
- 6e6: 73045703 lhu a4,1840(s0)
- 6ea: 82e19423 sh a4,-2008(gp) # 200000a8
- 6ee: 2c15 jal 922
- 6f0: 70442783 lw a5,1796(s0)
- 6f4: 103a0737 lui a4,0x103a0
- 6f8: 70070713 addi a4,a4,1792 # 103a0700 <_data_lma+0x1039e948>
- 6fc: f0f7f793 andi a5,a5,-241
- 700: 10e78363 beq a5,a4,806 <__stack_size+0x6>
- 704: 00f76a63 bltu a4,a5,718
- 708: 10320737 lui a4,0x10320
- 70c: 70070713 addi a4,a4,1792 # 10320700 <_data_lma+0x1031e948>
- 710: 06e78f63 beq a5,a4,78e
- 714: 0141 addi sp,sp,16
- 716: bcbd j 194 <__riscv_restore_0>
- 718: 103b0737 lui a4,0x103b0
- 71c: 70070713 addi a4,a4,1792 # 103b0700 <_data_lma+0x103ae948>
- 720: 08e78b63 beq a5,a4,7b6
- 724: 103d0737 lui a4,0x103d0
- 728: 70070713 addi a4,a4,1792 # 103d0700 <_data_lma+0x103ce948>
- 72c: fee794e3 bne a5,a4,714
- 730: 4585 li a1,1
- 732: 6521 lui a0,0x8
- 734: 3515 jal 558
- 736: 40011437 lui s0,0x40011
- 73a: 77e1 lui a5,0xffff8
- 73c: 04800493 li s1,72
- 740: 004c addi a1,sp,4
- 742: 80040513 addi a0,s0,-2048 # 40010800 <_eusrstack+0x2000b800>
- 746: 827c sh a5,4(sp)
- 748: c626 sw s1,12(sp)
- 74a: 33b9 jal 498
- 74c: 6785 lui a5,0x1
- 74e: 33878793 addi a5,a5,824 # 1338 <_free_r+0x9a>
- 752: 004c addi a1,sp,4
- 754: c0040513 addi a0,s0,-1024
- 758: 827c sh a5,4(sp)
- 75a: c626 sw s1,12(sp)
- 75c: 3b35 jal 498
- 75e: 4791 li a5,4
- 760: 827c sh a5,4(sp)
- 762: 004c addi a1,sp,4
- 764: 02800793 li a5,40
- 768: c0040513 addi a0,s0,-1024
- 76c: c63e sw a5,12(sp)
- 76e: 332d jal 498
- 770: 77f9 lui a5,0xffffe
- 772: 004c addi a1,sp,4
- 774: 40011537 lui a0,0x40011
- 778: 827c sh a5,4(sp)
- 77a: c626 sw s1,12(sp)
- 77c: 3b31 jal 498
- 77e: 478d li a5,3
- 780: 827c sh a5,4(sp)
- 782: c626 sw s1,12(sp)
- 784: 004c addi a1,sp,4
- 786: 40040513 addi a0,s0,1024
- 78a: 3339 jal 498
- 78c: b761 j 714
- 78e: 77e1 lui a5,0xffff8
- 790: 40011537 lui a0,0x40011
- 794: c007c793 xori a5,a5,-1024
- 798: 04800413 li s0,72
- 79c: 004c addi a1,sp,4
- 79e: c0050513 addi a0,a0,-1024 # 40010c00 <_eusrstack+0x2000bc00>
- 7a2: 827c sh a5,4(sp)
- 7a4: c622 sw s0,12(sp)
- 7a6: 39cd jal 498
- 7a8: 6789 lui a5,0x2
- 7aa: 827c sh a5,4(sp)
- 7ac: c622 sw s0,12(sp)
- 7ae: 004c addi a1,sp,4
- 7b0: 40011537 lui a0,0x40011
- 7b4: bfd9 j 78a
- 7b6: 4585 li a1,1
- 7b8: 6521 lui a0,0x8
- 7ba: 3b79 jal 558
- 7bc: 40011437 lui s0,0x40011
- 7c0: 77e1 lui a5,0xffff8
- 7c2: 04800493 li s1,72
- 7c6: 004c addi a1,sp,4
- 7c8: 80040513 addi a0,s0,-2048 # 40010800 <_eusrstack+0x2000b800>
- 7cc: 827c sh a5,4(sp)
- 7ce: c626 sw s1,12(sp)
- 7d0: 31e1 jal 498
- 7d2: 21000793 li a5,528
- 7d6: 004c addi a1,sp,4
- 7d8: c0040513 addi a0,s0,-1024
- 7dc: 827c sh a5,4(sp)
- 7de: c626 sw s1,12(sp)
- 7e0: 3965 jal 498
- 7e2: 4791 li a5,4
- 7e4: 827c sh a5,4(sp)
- 7e6: 004c addi a1,sp,4
- 7e8: 02800793 li a5,40
- 7ec: c0040513 addi a0,s0,-1024
- 7f0: c63e sw a5,12(sp)
- 7f2: 315d jal 498
- 7f4: 77f9 lui a5,0xffffe
- 7f6: 004c addi a1,sp,4
- 7f8: 40011537 lui a0,0x40011
- 7fc: 827c sh a5,4(sp)
- 7fe: c626 sw s1,12(sp)
- 800: 3961 jal 498
- 802: 4789 li a5,2
- 804: bfb5 j 780
- 806: 400114b7 lui s1,0x40011
- 80a: 77e1 lui a5,0xffff8
- 80c: 70078793 addi a5,a5,1792 # ffff8700 <_eusrstack+0xdfff3700>
- 810: 04800413 li s0,72
- 814: 004c addi a1,sp,4
- 816: 80048513 addi a0,s1,-2048 # 40010800 <_eusrstack+0x2000b800>
- 81a: 827c sh a5,4(sp)
- 81c: c622 sw s0,12(sp)
- 81e: 39ad jal 498
- 820: e3900793 li a5,-455
- 824: 004c addi a1,sp,4
- 826: c0048513 addi a0,s1,-1024
- 82a: 827c sh a5,4(sp)
- 82c: c622 sw s0,12(sp)
- 82e: 31ad jal 498
- 830: 4791 li a5,4
- 832: 827c sh a5,4(sp)
- 834: 004c addi a1,sp,4
- 836: 02800793 li a5,40
- 83a: c0048513 addi a0,s1,-1024
- 83e: c63e sw a5,12(sp)
- 840: 39a1 jal 498
- 842: 77f9 lui a5,0xffffe
- 844: b79d j 7aa
+00000528 :
+ 528: 20000197 auipc gp,0x20000
+ 52c: 35818193 addi gp,gp,856 # 20000880 <__global_pointer$>
+ 530: 20005117 auipc sp,0x20005
+ 534: ad010113 addi sp,sp,-1328 # 20005000 <_eusrstack>
+ 538: 00002517 auipc a0,0x2
+ 53c: ae050513 addi a0,a0,-1312 # 2018 <_data_lma>
+ 540: 20000597 auipc a1,0x20000
+ 544: ac058593 addi a1,a1,-1344 # 20000000 <_data_vma>
+ 548: 81818613 addi a2,gp,-2024 # 20000098 <_edata>
+ 54c: 00c5fa63 bgeu a1,a2,560
+ 550: 00052283 lw t0,0(a0)
+ 554: 0055a023 sw t0,0(a1)
+ 558: 0511 addi a0,a0,4
+ 55a: 0591 addi a1,a1,4
+ 55c: fec5eae3 bltu a1,a2,550
+ 560: 81818513 addi a0,gp,-2024 # 20000098 <_edata>
+ 564: 84418593 addi a1,gp,-1980 # 200000c4 <_ebss>
+ 568: 00b57763 bgeu a0,a1,576
+ 56c: 00052023 sw zero,0(a0)
+ 570: 0511 addi a0,a0,4
+ 572: feb56de3 bltu a0,a1,56c
+ 576: 42fd li t0,31
+ 578: bc029073 csrw 0xbc0,t0
+ 57c: 428d li t0,3
+ 57e: 80429073 csrw 0x804,t0
+ 582: 08800293 li t0,136
+ 586: 30029073 csrw mstatus,t0
+ 58a: 00000297 auipc t0,0x0
+ 58e: a7a28293 addi t0,t0,-1414 # 4 <_einit>
+ 592: 0032e293 ori t0,t0,3
+ 596: 30529073 csrw mtvec,t0
+ 59a: e13ff0ef jal ra,3ac
+ 59e: 00000297 auipc t0,0x0
+ 5a2: da428293 addi t0,t0,-604 # 342
+ 5a6: 34129073 csrw mepc,t0
+ 5aa: 30200073 mret
-00000846 :
- 846: 82a1a623 sw a0,-2004(gp) # 200000ac
- 84a: 8082 ret
+000005ae :
+ 5ae: 8201a503 lw a0,-2016(gp) # 200000a0
+ 5b2: 8082 ret
-0000084c :
- 84c: 40021737 lui a4,0x40021
- 850: 435c lw a5,4(a4)
- 852: 4691 li a3,4
- 854: 8bb1 andi a5,a5,12
- 856: 06d78c63 beq a5,a3,8ce
- 85a: 46a1 li a3,8
- 85c: 06d78e63 beq a5,a3,8d8
- 860: e7bd bnez a5,8ce
- 862: 431c lw a5,0(a4)
- 864: 8b91 andi a5,a5,4
- 866: c7a5 beqz a5,8ce
- 868: 000f47b7 lui a5,0xf4
- 86c: 24078793 addi a5,a5,576 # f4240 <_data_lma+0xf2488>
- 870: c11c sw a5,0(a0)
- 872: 40021637 lui a2,0x40021
- 876: 425c lw a5,4(a2)
- 878: 20000737 lui a4,0x20000
- 87c: 01070713 addi a4,a4,16 # 20000010
- 880: 8391 srli a5,a5,0x4
- 882: 8bbd andi a5,a5,15
- 884: 97ba add a5,a5,a4
- 886: 2394 lbu a3,0(a5)
- 888: 411c lw a5,0(a0)
- 88a: 00d7d7b3 srl a5,a5,a3
- 88e: c15c sw a5,4(a0)
- 890: 4254 lw a3,4(a2)
- 892: 82a1 srli a3,a3,0x8
- 894: 8a9d andi a3,a3,7
- 896: 96ba add a3,a3,a4
- 898: 2294 lbu a3,0(a3)
- 89a: 00d7d6b3 srl a3,a5,a3
- 89e: c514 sw a3,8(a0)
- 8a0: 4254 lw a3,4(a2)
- 8a2: 82ad srli a3,a3,0xb
- 8a4: 8a9d andi a3,a3,7
- 8a6: 9736 add a4,a4,a3
- 8a8: 2314 lbu a3,0(a4)
- 8aa: 00d7d6b3 srl a3,a5,a3
- 8ae: c554 sw a3,12(a0)
- 8b0: 4258 lw a4,4(a2)
- 8b2: 00074c63 bltz a4,8ca
- 8b6: 425c lw a5,4(a2)
- 8b8: 83b9 srli a5,a5,0xe
- 8ba: 0037f713 andi a4,a5,3
- 8be: 80418793 addi a5,gp,-2044 # 20000084
- 8c2: 97ba add a5,a5,a4
- 8c4: 239c lbu a5,0(a5)
- 8c6: 02f6d7b3 divu a5,a3,a5
- 8ca: c91c sw a5,16(a0)
- 8cc: 8082 ret
- 8ce: 007a17b7 lui a5,0x7a1
- 8d2: 20078793 addi a5,a5,512 # 7a1200 <_data_lma+0x79f448>
- 8d6: bf69 j 870
- 8d8: 435c lw a5,4(a4)
- 8da: 4358 lw a4,4(a4)
- 8dc: 66c1 lui a3,0x10
- 8de: 83c9 srli a5,a5,0x12
- 8e0: 8bbd andi a5,a5,15
- 8e2: 8f75 and a4,a4,a3
- 8e4: 0789 addi a5,a5,2
- 8e6: 46c5 li a3,17
- 8e8: 00d79363 bne a5,a3,8ee
- 8ec: 47c9 li a5,18
- 8ee: ef01 bnez a4,906
- 8f0: 40024737 lui a4,0x40024
- 8f4: 80072703 lw a4,-2048(a4) # 40023800 <_eusrstack+0x2001e800>
- 8f8: 8b41 andi a4,a4,16
- 8fa: cf09 beqz a4,914
- 8fc: 007a1737 lui a4,0x7a1
- 900: 20070713 addi a4,a4,512 # 7a1200 <_data_lma+0x79f448>
- 904: a821 j 91c
- 906: 40021737 lui a4,0x40021
- 90a: 4358 lw a4,4(a4)
- 90c: 00e71693 slli a3,a4,0xe
- 910: fe06d6e3 bgez a3,8fc
- 914: 003d1737 lui a4,0x3d1
- 918: 90070713 addi a4,a4,-1792 # 3d0900 <_data_lma+0x3ceb48>
- 91c: 02e787b3 mul a5,a5,a4
- 920: bf81 j 870
+000005b4 :
+ 5b4: 459c lw a5,8(a1)
+ 5b6: 0107f713 andi a4,a5,16
+ 5ba: 00f7f813 andi a6,a5,15
+ 5be: c701 beqz a4,5c6
+ 5c0: 41d8 lw a4,4(a1)
+ 5c2: 00e86833 or a6,a6,a4
+ 5c6: 218e lhu a1,0(a1)
+ 5c8: 0ff5f713 andi a4,a1,255
+ 5cc: c339 beqz a4,612
+ 5ce: 4118 lw a4,0(a0)
+ 5d0: 4681 li a3,0
+ 5d2: 4e85 li t4,1
+ 5d4: 4f3d li t5,15
+ 5d6: 02800f93 li t6,40
+ 5da: 04800293 li t0,72
+ 5de: 4e21 li t3,8
+ 5e0: 00de9633 sll a2,t4,a3
+ 5e4: 00c5f8b3 and a7,a1,a2
+ 5e8: 03161163 bne a2,a7,60a
+ 5ec: 00269893 slli a7,a3,0x2
+ 5f0: 011f1333 sll t1,t5,a7
+ 5f4: fff34313 not t1,t1
+ 5f8: 00e37733 and a4,t1,a4
+ 5fc: 011818b3 sll a7,a6,a7
+ 600: 00e8e733 or a4,a7,a4
+ 604: 05f79f63 bne a5,t6,662
+ 608: c950 sw a2,20(a0)
+ 60a: 0685 addi a3,a3,1
+ 60c: fdc69ae3 bne a3,t3,5e0
+ 610: c118 sw a4,0(a0)
+ 612: 0ff00713 li a4,255
+ 616: 04b77563 bgeu a4,a1,660
+ 61a: 4154 lw a3,4(a0)
+ 61c: 4621 li a2,8
+ 61e: 4e85 li t4,1
+ 620: 4f3d li t5,15
+ 622: 02800f93 li t6,40
+ 626: 04800293 li t0,72
+ 62a: 4e41 li t3,16
+ 62c: 00ce98b3 sll a7,t4,a2
+ 630: 0115f733 and a4,a1,a7
+ 634: 02e89263 bne a7,a4,658
+ 638: 00261713 slli a4,a2,0x2
+ 63c: 1701 addi a4,a4,-32
+ 63e: 00ef1333 sll t1,t5,a4
+ 642: fff34313 not t1,t1
+ 646: 00d376b3 and a3,t1,a3
+ 64a: 00e81733 sll a4,a6,a4
+ 64e: 8ed9 or a3,a3,a4
+ 650: 01f79d63 bne a5,t6,66a
+ 654: 01152a23 sw a7,20(a0)
+ 658: 0605 addi a2,a2,1
+ 65a: fdc619e3 bne a2,t3,62c
+ 65e: c154 sw a3,4(a0)
+ 660: 8082 ret
+ 662: fa5794e3 bne a5,t0,60a
+ 666: c910 sw a2,16(a0)
+ 668: b74d j 60a
+ 66a: fe5797e3 bne a5,t0,658
+ 66e: 01152823 sw a7,16(a0)
+ 672: b7dd j 658
-00000922 :
- 922: c599 beqz a1,930
- 924: 40021737 lui a4,0x40021
- 928: 4f1c lw a5,24(a4)
- 92a: 8d5d or a0,a0,a5
- 92c: cf08 sw a0,24(a4)
- 92e: 8082 ret
- 930: 400217b7 lui a5,0x40021
- 934: 4f98 lw a4,24(a5)
- 936: fff54513 not a0,a0
- 93a: 8d79 and a0,a0,a4
- 93c: cf88 sw a0,24(a5)
- 93e: 8082 ret
+00000674 :
+ 674: c90c sw a1,16(a0)
+ 676: 8082 ret
-00000940 :
- 940: 831ff2ef jal t0,170 <__riscv_save_0>
- 944: 2916 lhu a3,16(a0)
- 946: 77f5 lui a5,0xffffd
- 948: 17fd addi a5,a5,-1
- 94a: 8ff5 and a5,a5,a3
- 94c: 21f6 lhu a3,6(a1)
- 94e: 25da lhu a4,12(a1)
- 950: 7179 addi sp,sp,-48
- 952: 8fd5 or a5,a5,a3
- 954: a91e sh a5,16(a0)
- 956: 2556 lhu a3,12(a0)
- 958: 77fd lui a5,0xfffff
- 95a: 9f378793 addi a5,a5,-1549 # ffffe9f3 <_eusrstack+0xdfff99f3>
- 95e: 8ff5 and a5,a5,a3
- 960: 21d6 lhu a3,4(a1)
- 962: 842a mv s0,a0
- 964: c62e sw a1,12(sp)
- 966: 8fd5 or a5,a5,a3
- 968: 2596 lhu a3,8(a1)
- 96a: 8fd5 or a5,a5,a3
- 96c: 25b6 lhu a3,10(a1)
- 96e: 8fd5 or a5,a5,a3
- 970: a55e sh a5,12(a0)
- 972: 295e lhu a5,20(a0)
- 974: 07c2 slli a5,a5,0x10
- 976: 83c1 srli a5,a5,0x10
- 978: cff7f793 andi a5,a5,-769
- 97c: 8fd9 or a5,a5,a4
- 97e: a95e sh a5,20(a0)
- 980: 0868 addi a0,sp,28
- 982: 35e9 jal 84c
- 984: 400147b7 lui a5,0x40014
- 988: 80078793 addi a5,a5,-2048 # 40013800 <_eusrstack+0x2000e800>
- 98c: 45b2 lw a1,12(sp)
- 98e: 04f41a63 bne s0,a5,9e2
- 992: 57a2 lw a5,40(sp)
- 994: 2456 lhu a3,12(s0)
- 996: 4765 li a4,25
- 998: 02e787b3 mul a5,a5,a4
- 99c: 06c2 slli a3,a3,0x10
- 99e: 86c1 srai a3,a3,0x10
- 9a0: 4198 lw a4,0(a1)
- 9a2: 0406d263 bgez a3,9e6
- 9a6: 0706 slli a4,a4,0x1
- 9a8: 2452 lhu a2,12(s0)
- 9aa: 0642 slli a2,a2,0x10
- 9ac: 02e7d7b3 divu a5,a5,a4
- 9b0: 06400713 li a4,100
- 9b4: 8641 srai a2,a2,0x10
- 9b6: 02e7d6b3 divu a3,a5,a4
- 9ba: 02e7f7b3 remu a5,a5,a4
- 9be: 0692 slli a3,a3,0x4
- 9c0: 02065563 bgez a2,9ea
- 9c4: 078e slli a5,a5,0x3
- 9c6: 03278793 addi a5,a5,50
- 9ca: 02e7d7b3 divu a5,a5,a4
- 9ce: 0077f713 andi a4,a5,7
- 9d2: 00d767b3 or a5,a4,a3
- 9d6: 07c2 slli a5,a5,0x10
- 9d8: 83c1 srli a5,a5,0x10
- 9da: a41e sh a5,8(s0)
- 9dc: 6145 addi sp,sp,48
- 9de: fb6ff06f j 194 <__riscv_restore_0>
- 9e2: 5792 lw a5,36(sp)
- 9e4: bf45 j 994
- 9e6: 070a slli a4,a4,0x2
- 9e8: b7c1 j 9a8
- 9ea: 0792 slli a5,a5,0x4
- 9ec: 03278793 addi a5,a5,50
- 9f0: 02e7d7b3 divu a5,a5,a4
- 9f4: 8bbd andi a5,a5,15
- 9f6: 8fd5 or a5,a5,a3
- 9f8: bff9 j 9d6
+00000678 :
+ 678: c219 beqz a2,67e
+ 67a: c90c sw a1,16(a0)
+ 67c: 8082 ret
+ 67e: c94c sw a1,20(a0)
+ 680: 8082 ret
-000009fa :
- 9fa: c591 beqz a1,a06
- 9fc: 255e lhu a5,12(a0)
- 9fe: 6709 lui a4,0x2
- a00: 8fd9 or a5,a5,a4
- a02: a55e sh a5,12(a0)
- a04: 8082 ret
- a06: 255a lhu a4,12(a0)
- a08: 77f9 lui a5,0xffffe
- a0a: 17fd addi a5,a5,-1
- a0c: 8ff9 and a5,a5,a4
- a0e: bfd5 j a02
+00000682 :
+ 682: c0000737 lui a4,0xc0000
+ 686: 00e577b3 and a5,a0,a4
+ 68a: 08e79563 bne a5,a4,714
+ 68e: 40010737 lui a4,0x40010
+ 692: 435c lw a5,4(a4)
+ 694: 01b55693 srli a3,a0,0x1b
+ 698: 4f58 lw a4,28(a4)
+ 69a: 8a9d andi a3,a3,7
+ 69c: e69d bnez a3,6ca
+ 69e: 9bf9 andi a5,a5,-2
+ 6a0: ff0006b7 lui a3,0xff000
+ 6a4: 16fd addi a3,a3,-1
+ 6a6: 8f75 and a4,a4,a3
+ 6a8: c989 beqz a1,6ba
+ 6aa: 01051693 slli a3,a0,0x10
+ 6ae: 82c1 srli a3,a3,0x10
+ 6b0: 8fd5 or a5,a5,a3
+ 6b2: 01ff06b7 lui a3,0x1ff0
+ 6b6: 8d75 and a0,a0,a3
+ 6b8: 8f49 or a4,a4,a0
+ 6ba: 070006b7 lui a3,0x7000
+ 6be: 8fd5 or a5,a5,a3
+ 6c0: 400106b7 lui a3,0x40010
+ 6c4: c2dc sw a5,4(a3)
+ 6c6: ced8 sw a4,28(a3)
+ 6c8: 8082 ret
+ 6ca: 4605 li a2,1
+ 6cc: 00c69663 bne a3,a2,6d8
+ 6d0: 9bf5 andi a5,a5,-3
+ 6d2: ff8006b7 lui a3,0xff800
+ 6d6: b7f9 j 6a4
+ 6d8: 4609 li a2,2
+ 6da: 00c69663 bne a3,a2,6e6
+ 6de: 9bed andi a5,a5,-5
+ 6e0: ffe806b7 lui a3,0xffe80
+ 6e4: b7c1 j 6a4
+ 6e6: 460d li a2,3
+ 6e8: 00c69663 bne a3,a2,6f4
+ 6ec: 9bdd andi a5,a5,-9
+ 6ee: fffc06b7 lui a3,0xfffc0
+ 6f2: bf4d j 6a4
+ 6f4: 4611 li a2,4
+ 6f6: 00c69763 bne a3,a2,704
+ 6fa: f3f7f793 andi a5,a5,-193
+ 6fe: ffc006b7 lui a3,0xffc00
+ 702: b74d j 6a4
+ 704: 4615 li a2,5
+ 706: fac691e3 bne a3,a2,6a8
+ 70a: cff7f793 andi a5,a5,-769
+ 70e: ffe006b7 lui a3,0xffe00
+ 712: bf49 j 6a4
+ 714: 40000737 lui a4,0x40000
+ 718: 02e79163 bne a5,a4,73a
+ 71c: 400107b7 lui a5,0x40010
+ 720: 4fd8 lw a4,28(a5)
+ 722: 0542 slli a0,a0,0x10
+ 724: 00a767b3 or a5,a4,a0
+ 728: e589 bnez a1,732
+ 72a: fff54513 not a0,a0
+ 72e: 00e577b3 and a5,a0,a4
+ 732: 40010737 lui a4,0x40010
+ 736: cf5c sw a5,28(a4)
+ 738: 8082 ret
+ 73a: e3a9 bnez a5,77c