2231 lines
101 KiB
Plaintext
2231 lines
101 KiB
Plaintext
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C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 1
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C51 COMPILER V9.01, COMPILATION OF MODULE UARTAPP
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OBJECT MODULE PLACED IN .\output\UartApp.obj
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COMPILER INVOKED BY: D:\Tool\Keil\C51\BIN\C51.EXE code_app\UartApp.c LARGE OPTIMIZE(7,SIZE) REGFILE(.\output\MCUCore_Loa
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-d.ORC) BROWSE INTVECTOR(0X1000) INCDIR(.\header_app;.\header_drv;.\code_gasguage;.\code_classb\iec60730_lib\include;.\co
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-de_classb\iec60730_proc\Include;.\code_classb\config) DEBUG OBJECTEXTEND PRINT(.\output\UartApp.lst) OBJECT(.\output\Uar
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-tApp.obj)
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line level source
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1 /********************************************************************************
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2 Copyright (C), Sinowealth Electronic. Ltd.
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3 Author: Sino
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4 Version: V0.0
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5 Date: 2020/04/26
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6 History:
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7 V2.0 2020/04/26 Preliminary
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8 ********************************************************************************/
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9 #include "Main.h"
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10
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11
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12 BOOL bISPFlg; //ISP<53><50><EFBFBD><EFBFBD><EFBFBD><EFBFBD>־<EFBFBD><D6BE><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ISP<53><50><EFBFBD><EFBFBD>
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13 BOOL bUart0ReadFlg;
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14 BOOL bUart0WriteFlg;
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15 BOOL bUart0SndAckFlg; //UART<52>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD>ACK<43><4B><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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16
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17 BOOL bUart1ReadFlg;
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18 BOOL bUart1WriteFlg;
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19 BOOL bUart1SndAckFlg; //UART<52>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD>ACK<43><4B><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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20
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21 BOOL bUart2ReadFlg;
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22 BOOL bUart2WriteFlg;
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23 BOOL bUart2SndAckFlg; //UART<52>Ѿ<EFBFBD><D1BE><EFBFBD><EFBFBD><EFBFBD>ACK<43><4B><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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24
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25 U8 xdata ucSubClassID;
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26 U8 xdata ucUart0Buf[150] _at_ 0x400; //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>BUF
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27 U8 xdata ucUart0BufPT; //UART<52><54><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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28 U8 xdata ucUart0SndLength; //UART<52><54><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
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29 U8 xdata ucUart0TimeoutCnt; //UARTͨѶ<CDA8><D1B6>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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30
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31 U8 xdata ucUart1Buf[150] _at_ 0x4a0; //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>BUF
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32 U8 xdata ucUart1BufPT; //UART<52><54><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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33 U8 xdata ucUart1SndLength; //UART<52><54><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
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34 U8 xdata ucUart1TimeoutCnt; //UARTͨѶ<CDA8><D1B6>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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35
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36 U8 xdata ucUart2Buf[150] _at_ 0x540; //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ݵ<EFBFBD>BUF
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37 U8 xdata ucUart2BufPT; //UART<52><54><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>
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38 U8 xdata ucUart2SndLength; //UART<52><54><EFBFBD>ݳ<EFBFBD><DDB3><EFBFBD>
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39 U8 xdata ucUart2TimeoutCnt; //UARTͨѶ<CDA8><D1B6>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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40
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41 U16 xdata uiReceCheckSum; //֡ͷ<D6A1>ж<EFBFBD><D0B6><EFBFBD>ȷ
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42 U8 xdata ucUartErrCode;
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43
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44
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45 /*******************************************************************************
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46 Function: Page1WrRdFuncTable()
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47 Description:
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48 Input: NULL
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49 Output: NULL
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50 Others: NULL
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51 *******************************************************************************/
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52 U16 code Page1WrRdFuncTable[18]=
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C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 2
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53 {
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54 SYS_PARA_MAP_ADDR, //SubClassID 0x00
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55 SYSINFO_MAP_ADDR, //0x01
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56 CHG_PARA_MAP_ADDR, //0x02
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57 DSG_PARA_MAP_ADDR, //0x03
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58 0x00, //0x04
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59 DSG_PWM_PARA_MAP_ADDR, //0x05
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60 CHG_TEMP_PARA_MAP_ADDR, //0x06
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61 DSG_TEMP_PARA_MAP_ADDR, //0x07
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62 BAL_PARA_MAP_ADDR, //0x08
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63 SOC_PARA_MAP_ADDR, //0x09
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64 AFE_PARA_MAP_ADDR, //0x0A
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65 CALI_PARA_MAP_ADDR, //0x0B
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66 DataflashCheck_Map_ADDR, //0x0C
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67 0x00, //0x0D
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68 0x00, //0x0E
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69 0x00, //0x0F
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70 0x00, //0x10
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71 0x00, //0x11
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72 };
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73
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74 /*******************************************************************************
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75 Function: Page2WrRdFuncTable()
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76 Description:
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77 Input: NULL
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78 Output: NULL
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79 Others: NULL
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80 *******************************************************************************/
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81 U16 code Page2WrRdFuncTable[18]=
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82 {
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83 SYS_PARA_MAP_ADDR+32, //SubClassID 0x00
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84 SYSINFO_MAP_ADDR+32, //0x01
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85 CHG_PARA_MAP_ADDR+32, //0x02
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86 DSG_PARA_MAP_ADDR+32, //0x03
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87 0x00, //0x04
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88 DSG_PWM_PARA_MAP_ADDR+32, //0x05
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89 CHG_TEMP_PARA_MAP_ADDR+32, //0x06
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90 DSG_TEMP_PARA_MAP_ADDR+32, //0x07
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91 BAL_PARA_MAP_ADDR+32, //0x08
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92 SOC_PARA_MAP_ADDR+32, //0x09
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93 AFE_PARA_MAP_ADDR+32, //0x0A
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94 CALI_PARA_MAP_ADDR+32, //0x0B
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95 DataflashCheck_Map_ADDR+32, //0x0C
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96 0x00, //0x0D
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97 0x00, //0x0E
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98 0x00, //0x0F
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99 0x00, //0x10
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100 0x00, //0x11
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101 };
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102
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103 #if (UART0_DEFINE != 0)
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104 /*************************************************************************************************
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105 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0Handshake
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106 * <20><> <20><>: <20><>
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107 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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108 * <20><> <20><>: UART0ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>Э<EFBFBD><D0AD>
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109 *************************************************************************************************/
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110 void Uart0Handshake(void)
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111 {
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112 1 if(ucUart0Buf[2] == 0x00) //Testing equipment is properly
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113 1 {
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114 2 Uart0SendAck();
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C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 3
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115 2 }
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116 1 else
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117 1 {
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118 2 Uart0SendNack();
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119 2 }
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120 1 }
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121 #endif
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122
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123 #if (UART1_DEFINE != 0)
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/*************************************************************************************************
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* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1Handshake
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* <20><> <20><>: <20><>
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* <20><><EFBFBD><EFBFBD>ֵ: <20><>
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* <20><> <20><>: UART1ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>Э<EFBFBD><D0AD>
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*************************************************************************************************/
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void Uart1Handshake(void)
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{
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if(ucUart1Buf[2] == 0x00) //Testing equipment is properly
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{
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Uart1SendAck();
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}
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else
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{
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Uart1SendNack();
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}
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}
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#endif
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142
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143 #if (UART2_DEFINE != 0)
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/*************************************************************************************************
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* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2Handshake
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* <20><> <20><>: <20><>
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* <20><><EFBFBD><EFBFBD>ֵ: <20><>
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* <20><> <20><>: UART2ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>Э<EFBFBD><D0AD>
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*************************************************************************************************/
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void Uart2Handshake(void)
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{
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if(ucUart2Buf[2] == 0x00) //Testing equipment is properly
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{
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Uart2SendAck();
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}
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else
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{
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Uart2SendNack();
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}
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}
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#endif
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162
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163 #if (UART0_DEFINE != 0)
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164 /*************************************************************************************************
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165 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0WriteInfo
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166 * <20><> <20><>: ptr<74><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
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167 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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168 * <20><> <20><>: UART0д<30><D0B4><EFBFBD><EFBFBD>
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169 *************************************************************************************************/
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170 void Uart0WriteInfo(U8 xdata *ptr)
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171 {
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172 1 U8 i;
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173 1
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174 1 if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
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175 1 {
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176 2 for(i=0; i<ucUart0Buf[UART_LENGTH]; i++)
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C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 4
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177 2 {
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178 3 McuWDTClear();
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179 3 *ptr = ucUart0Buf[3+i];
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180 3 ptr++;
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181 3 }
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182 2 bMcuFlashWrWaitFlg = 1; //Updated parameters, and written to the flash
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183 2 bMcuFlashWrWaitCnt = 0;
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184 2
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185 2 Uart0SendAck();
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186 2 }
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187 1 else
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188 1 {
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189 2 Uart0SendNack();
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190 2 }
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191 1 }
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192 #endif
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193
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194 #if (UART1_DEFINE != 0)
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/*************************************************************************************************
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* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1WriteInfo
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* <20><> <20><>: ptr<74><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
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* <20><><EFBFBD><EFBFBD>ֵ: <20><>
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* <20><> <20><>: UART1д<31><D0B4><EFBFBD><EFBFBD>
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*************************************************************************************************/
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void Uart1WriteInfo(U8 xdata *ptr)
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{
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U8 i;
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if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
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{
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for(i=0; i<ucUart1Buf[UART_LENGTH]; i++)
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{
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McuWDTClear();
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*ptr = ucUart1Buf[3+i];
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ptr++;
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}
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bMcuFlashWrWaitFlg = 1; //Updated parameters, and written to the flash
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bMcuFlashWrWaitCnt = 0;
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Uart1SendAck();
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}
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else
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{
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Uart1SendNack();
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}
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}
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#endif
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224
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225 #if (UART2_DEFINE != 0)
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/*************************************************************************************************
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* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2WriteInfo
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* <20><> <20><>: ptr<74><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫд<D2AA><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
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* <20><><EFBFBD><EFBFBD>ֵ: <20><>
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* <20><> <20><>: UART2д<32><D0B4><EFBFBD><EFBFBD>
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*************************************************************************************************/
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void Uart2WriteInfo(U8 xdata *ptr)
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{
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U8 i;
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if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
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{
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for(i=0; i<ucUart2Buf[UART_LENGTH]; i++)
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C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 5
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{
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McuWDTClear();
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*ptr = ucUart2Buf[3+i];
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ptr++;
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}
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bMcuFlashWrWaitFlg = 1; //Updated parameters, and written to the flash
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bMcuFlashWrWaitCnt = 0;
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Uart2SendAck();
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}
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else
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{
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Uart2SendNack();
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}
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}
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#endif
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255
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256 #if (UART0_DEFINE != 0)
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257 /*************************************************************************************************
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258 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0ReadInfo
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259 * <20><> <20><>: ptr<74><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
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260 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
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261 * <20><> <20><>: UART0<54><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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262 *************************************************************************************************/
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263 void Uart0ReadInfo(U8 xdata *ptr)
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264 {
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265 1 U8 i;
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266 1
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267 1 if(ucUart0Buf[UART_LENGTH] > 140)
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268 1 {
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269 2 ucUart0Buf[UART_LENGTH] = 0;
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270 2 }
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271 1 for(i=0; i<ucUart0Buf[UART_LENGTH]; i++)
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272 1 {
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273 2 McuWDTClear();
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274 2 ucUart0Buf[3+i] = *ptr;
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275 2 ptr++;
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276 2 }
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277 1 ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] = CRC8cal(&ucUart0Buf,ucUart0Buf[UART_LENGTH]+3);
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278 1
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279 1 Uart0SendData(); //Start Send Data; Set UART REG
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280 1 }
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281 #endif
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282
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283 #if (UART1_DEFINE != 0)
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/*************************************************************************************************
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* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1ReadInfo
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* <20><> <20><>: ptr<74><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
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* <20><><EFBFBD><EFBFBD>ֵ: <20><>
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* <20><> <20><>: UART1<54><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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*************************************************************************************************/
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void Uart1ReadInfo(U8 xdata *ptr)
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{
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U8 i;
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if(ucUart1Buf[UART_LENGTH] > 140)
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{
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ucUart1Buf[UART_LENGTH] = 0;
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}
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for(i=0; i<ucUart1Buf[UART_LENGTH]; i++)
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{
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McuWDTClear();
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C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 6
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ucUart1Buf[3+i] = *ptr;
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ptr++;
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}
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|||
|
ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] = CRC8cal(&ucUart1Buf,ucUart1Buf[UART_LENGTH]+3);
|
|||
|
|
|||
|
Uart1SendData(); //Start Send Data; Set UART REG
|
|||
|
}
|
|||
|
#endif
|
|||
|
309
|
|||
|
310 #if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2ReadInfo
|
|||
|
* <20><> <20><>: ptr<74><72><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>ַ
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART2<54><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2ReadInfo(U8 xdata *ptr)
|
|||
|
{
|
|||
|
U8 i;
|
|||
|
|
|||
|
if(ucUart2Buf[UART_LENGTH] > 140)
|
|||
|
{
|
|||
|
ucUart2Buf[UART_LENGTH] = 0;
|
|||
|
}
|
|||
|
for(i=0; i<ucUart2Buf[UART_LENGTH]; i++)
|
|||
|
{
|
|||
|
McuWDTClear();
|
|||
|
ucUart2Buf[3+i] = *ptr;
|
|||
|
ptr++;
|
|||
|
}
|
|||
|
ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] = CRC8cal(&ucUart2Buf,ucUart2Buf[UART_LENGTH]+3);
|
|||
|
|
|||
|
Uart2SendData(); //Start Send Data; Set UART REG
|
|||
|
}
|
|||
|
#endif
|
|||
|
336
|
|||
|
337 #if (UART0_DEFINE != 0)
|
|||
|
338 /*************************************************************************************************
|
|||
|
339 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0WriteManufacture
|
|||
|
340 * <20><> <20><>: <20><>
|
|||
|
341 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
342 * <20><> <20><>: <20><>λ<EFBFBD><CEBB>ͨ<EFBFBD><CDA8>UART0д<30><D0B4><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
343 0x41<34><31>ϵͳ<CFB5><CDB3>λ
|
|||
|
344 0x05<30><35>ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD>PD
|
|||
|
345 *************************************************************************************************/
|
|||
|
346 void Uart0WriteManufacture(void)
|
|||
|
347 {
|
|||
|
348 1 if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
349 1 {
|
|||
|
350 2 if(ucUart0Buf[4] == 0x41) //0x0041: Reset system
|
|||
|
351 2 {
|
|||
|
352 3 ucResetFlag = 0x12;
|
|||
|
353 3 }
|
|||
|
354 2 else if(ucUart0Buf[4] == 0x05) //0x0005: Enter sleep mode
|
|||
|
355 2 {
|
|||
|
356 3 bPCEnterPDFlg = 1;
|
|||
|
357 3 }
|
|||
|
358 2 bUart0SndAckFlg = 0;
|
|||
|
359 2 Uart0SendAck();
|
|||
|
360 2 }
|
|||
|
361 1 else
|
|||
|
362 1 {
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 7
|
|||
|
|
|||
|
363 2 Uart0SendNack();
|
|||
|
364 2 }
|
|||
|
365 1 }
|
|||
|
366 #endif
|
|||
|
367
|
|||
|
368 #if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1WriteManufacture
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: <20><>λ<EFBFBD><CEBB>ͨ<EFBFBD><CDA8>UART1д<31><D0B4><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
0x41<34><31>ϵͳ<CFB5><CDB3>λ
|
|||
|
0x05<30><35>ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD>PD
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1WriteManufacture(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
if(ucUart1Buf[4] == 0x41) //0x0041: Reset system
|
|||
|
{
|
|||
|
ucResetFlag = 0x12;
|
|||
|
}
|
|||
|
else if(ucUart1Buf[4] == 0x05) //0x0005: Enter sleep mode
|
|||
|
{
|
|||
|
bPCEnterPDFlg = 1;
|
|||
|
}
|
|||
|
bUart1SndAckFlg = 0;
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
398
|
|||
|
399 #if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2WriteManufacture
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: <20><>λ<EFBFBD><CEBB>ͨ<EFBFBD><CDA8>UART2д<32><D0B4><EFBFBD>Զ<EFBFBD><D4B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
0x41<34><31>ϵͳ<CFB5><CDB3>λ
|
|||
|
0x05<30><35>ϵͳ<CFB5><CDB3><EFBFBD><EFBFBD>PD
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2WriteManufacture(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
if(ucUart2Buf[4] == 0x41) //0x0041: Reset system
|
|||
|
{
|
|||
|
ucResetFlag = 0x12;
|
|||
|
}
|
|||
|
else if(ucUart2Buf[4] == 0x05) //0x0005: Enter sleep mode
|
|||
|
{
|
|||
|
bPCEnterPDFlg = 1;
|
|||
|
}
|
|||
|
bUart2SndAckFlg = 0;
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 8
|
|||
|
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
429
|
|||
|
430 #if (UART0_DEFINE != 0)
|
|||
|
431 /*************************************************************************************************
|
|||
|
432 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0ReadSubClassID
|
|||
|
433 * <20><> <20><>: <20><>
|
|||
|
434 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
435 * <20><> <20><>: UART0<54><30><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
436 *************************************************************************************************/
|
|||
|
437 void Uart0ReadSubClassID(void)
|
|||
|
438 {
|
|||
|
439 1 if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
440 1 {
|
|||
|
441 2 ucSubClassID=ucUart0Buf[3];
|
|||
|
442 2
|
|||
|
443 2 bUart0SndAckFlg = 0;
|
|||
|
444 2 Uart0SendAck();
|
|||
|
445 2 }
|
|||
|
446 1 else
|
|||
|
447 1 {
|
|||
|
448 2 Uart0SendNack();
|
|||
|
449 2 }
|
|||
|
450 1 }
|
|||
|
451 #endif
|
|||
|
452
|
|||
|
453 #if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1ReadSubClassID
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART1<54><31><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1ReadSubClassID(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
ucSubClassID=ucUart1Buf[3];
|
|||
|
|
|||
|
bUart1SndAckFlg = 0;
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
475
|
|||
|
476 #if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2ReadSubClassID
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART2<54><32><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2ReadSubClassID(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 9
|
|||
|
|
|||
|
ucSubClassID=ucUart2Buf[3];
|
|||
|
|
|||
|
bUart2SndAckFlg = 0;
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
498
|
|||
|
499 #if (UART0_DEFINE != 0)
|
|||
|
500 /*************************************************************************************************
|
|||
|
501 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0RdCmdProcess
|
|||
|
502 * <20><> <20><>: <20><>
|
|||
|
503 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
504 * <20><> <20><>: UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEB4A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
505 *************************************************************************************************/
|
|||
|
506 void Uart0RdCmdProcess(void)
|
|||
|
507 {
|
|||
|
508 1 U8 xdata *rdaddr;
|
|||
|
509 1
|
|||
|
510 1 switch(ucUart0Buf[UART_CMD_NO])
|
|||
|
511 1 {
|
|||
|
512 2 case CELL1:
|
|||
|
513 2 case CELL2:
|
|||
|
514 2 case CELL3:
|
|||
|
515 2 case CELL4:
|
|||
|
516 2 case CELL5:
|
|||
|
517 2 case CELL6:
|
|||
|
518 2 case CELL7:
|
|||
|
519 2 case CELL8:
|
|||
|
520 2 case CELL9:
|
|||
|
521 2 case CELL10:
|
|||
|
522 2 Uart0ReadInfo((U8 xdata *)&Info.uiVCell[ucUart0Buf[UART_CMD_NO]-1]);
|
|||
|
523 2 break;
|
|||
|
524 2
|
|||
|
525 2 case TOTAL_VOLTAGE:
|
|||
|
526 2 Uart0ReadInfo((U8 xdata *)&Info.ulVoltage);
|
|||
|
527 2 break;
|
|||
|
528 2
|
|||
|
529 2 case CADC_CURRENT:
|
|||
|
530 2 Uart0ReadInfo((U8 xdata *)&Info.slCurr);
|
|||
|
531 2 break;
|
|||
|
532 2
|
|||
|
533 2 case EXT_TEMP1:
|
|||
|
534 2 Uart0ReadInfo((U8 xdata *)&Info.uiTS[0]);
|
|||
|
535 2 break;
|
|||
|
536 2
|
|||
|
537 2 case EXT_TEMP2:
|
|||
|
538 2 Uart0ReadInfo((U8 xdata *)&Info.uiTS[1]);
|
|||
|
539 2 break;
|
|||
|
540 2
|
|||
|
541 2 case DIE_TEMP1:
|
|||
|
542 2 Uart0ReadInfo((U8 xdata *)&Info.uiICTempe[0]);
|
|||
|
543 2 break;
|
|||
|
544 2
|
|||
|
545 2 case DIE_TEMP2:
|
|||
|
546 2 Uart0ReadInfo((U8 xdata *)&Info.uiICTempe[1]);
|
|||
|
547 2 break;
|
|||
|
548 2
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 10
|
|||
|
|
|||
|
549 2 case FULL_CHG_CAP:
|
|||
|
550 2 Uart0ReadInfo((U8 xdata *)&Info.ulFCC);
|
|||
|
551 2 break;
|
|||
|
552 2
|
|||
|
553 2 case REMAIN_CAP:
|
|||
|
554 2 Uart0ReadInfo((U8 xdata *)&Info.ulRC);
|
|||
|
555 2 break;
|
|||
|
556 2
|
|||
|
557 2 case R_SOC:
|
|||
|
558 2 Uart0ReadInfo((U8 xdata *)&Info.uiRSOC);
|
|||
|
559 2 break;
|
|||
|
560 2
|
|||
|
561 2 case CYCLE_COUNT:
|
|||
|
562 2 Uart0ReadInfo((U8 xdata *)&Info.uiCycleCount);
|
|||
|
563 2 break;
|
|||
|
564 2
|
|||
|
565 2 case PACK_STATUS:
|
|||
|
566 2 Uart0ReadInfo((U8 xdata *)&Info.uiPackStatus);
|
|||
|
567 2 break;
|
|||
|
568 2
|
|||
|
569 2 case BATTERY_STATUS:
|
|||
|
570 2 Uart0ReadInfo((U8 xdata *)&Info.uiBatStatus);
|
|||
|
571 2 break;
|
|||
|
572 2
|
|||
|
573 2 case PACK_CONFIG:
|
|||
|
574 2 Uart0ReadInfo((U8 xdata *)&Info.uiPackConfig);
|
|||
|
575 2 break;
|
|||
|
576 2
|
|||
|
577 2 case MANUFACTURE_COMMAND:
|
|||
|
578 2 Uart0ReadInfo((U8 xdata *)&Info.uiManuCommand);
|
|||
|
579 2 break;
|
|||
|
580 2
|
|||
|
581 2 default: //read extern EEPRom data
|
|||
|
582 2 if(ucUart0Buf[UART_LENGTH] >= 128)
|
|||
|
583 2 {
|
|||
|
584 3 bE2PProcessFlg = 1;
|
|||
|
585 3 bUart0E2PRdData = 1;
|
|||
|
586 3 }
|
|||
|
587 2 else if(ucUart0Buf[UART_CMD_NO] == SUB_PAGE1 && ucSubClassID == RTC_SUBID)
|
|||
|
588 2 {
|
|||
|
589 3 bE2PProcessFlg = 1;
|
|||
|
590 3 bUart0RTCRdTime = 1;
|
|||
|
591 3 }
|
|||
|
592 2 else if(ucUart0Buf[UART_CMD_NO] == SUB_PAGE1)
|
|||
|
593 2 {
|
|||
|
594 3 rdaddr = (U8 xdata *)Page1WrRdFuncTable[ucSubClassID];
|
|||
|
595 3 Uart0ReadInfo(rdaddr);
|
|||
|
596 3 }
|
|||
|
597 2 else if(ucUart0Buf[UART_CMD_NO] == SUB_PAGE2)
|
|||
|
598 2 {
|
|||
|
599 3 rdaddr = (U8 xdata *)Page2WrRdFuncTable[ucSubClassID];
|
|||
|
600 3 Uart0ReadInfo(rdaddr);
|
|||
|
601 3 }
|
|||
|
602 2 break;
|
|||
|
603 2 }
|
|||
|
604 1 }
|
|||
|
605 #endif
|
|||
|
606
|
|||
|
607 #if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0RdCmdProcess
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 11
|
|||
|
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEB4A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1RdCmdProcess(void)
|
|||
|
{
|
|||
|
U8 xdata *rdaddr;
|
|||
|
|
|||
|
switch(ucUart1Buf[UART_CMD_NO])
|
|||
|
{
|
|||
|
case CELL1:
|
|||
|
case CELL2:
|
|||
|
case CELL3:
|
|||
|
case CELL4:
|
|||
|
case CELL5:
|
|||
|
case CELL6:
|
|||
|
case CELL7:
|
|||
|
case CELL8:
|
|||
|
case CELL9:
|
|||
|
case CELL10:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiVCell[ucUart1Buf[UART_CMD_NO]-1]);
|
|||
|
break;
|
|||
|
|
|||
|
case TOTAL_VOLTAGE:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.ulVoltage);
|
|||
|
break;
|
|||
|
|
|||
|
case CADC_CURRENT:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.slCurr);
|
|||
|
break;
|
|||
|
|
|||
|
case EXT_TEMP1:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiTS[0]);
|
|||
|
break;
|
|||
|
|
|||
|
case EXT_TEMP2:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiTS[1]);
|
|||
|
break;
|
|||
|
|
|||
|
case DIE_TEMP1:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiICTempe[0]);
|
|||
|
break;
|
|||
|
|
|||
|
case DIE_TEMP2:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiICTempe[1]);
|
|||
|
break;
|
|||
|
|
|||
|
case FULL_CHG_CAP:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.ulFCC);
|
|||
|
break;
|
|||
|
|
|||
|
case REMAIN_CAP:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.ulRC);
|
|||
|
break;
|
|||
|
|
|||
|
case R_SOC:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiRSOC);
|
|||
|
break;
|
|||
|
|
|||
|
case CYCLE_COUNT:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiCycleCount);
|
|||
|
break;
|
|||
|
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 12
|
|||
|
|
|||
|
case PACK_STATUS:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiPackStatus);
|
|||
|
break;
|
|||
|
|
|||
|
case BATTERY_STATUS:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiBatStatus);
|
|||
|
break;
|
|||
|
|
|||
|
case PACK_CONFIG:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiPackConfig);
|
|||
|
break;
|
|||
|
|
|||
|
case MANUFACTURE_COMMAND:
|
|||
|
Uart1ReadInfo((U8 xdata *)&Info.uiManuCommand);
|
|||
|
break;
|
|||
|
|
|||
|
default: //read extern EEPRom data
|
|||
|
if(ucUart1Buf[UART_LENGTH] >= 128)
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bUart1E2PRdData = 1;
|
|||
|
}
|
|||
|
else if(ucUart1Buf[UART_CMD_NO] == SUB_PAGE1 && ucSubClassID == RTC_SUBID)
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bUart1RTCRdTime = 1;
|
|||
|
}
|
|||
|
else if(ucUart1Buf[UART_CMD_NO] == SUB_PAGE1)
|
|||
|
{
|
|||
|
rdaddr = (U8 xdata *)Page1WrRdFuncTable[ucSubClassID];
|
|||
|
Uart1ReadInfo(rdaddr);
|
|||
|
}
|
|||
|
else if(ucUart1Buf[UART_CMD_NO] == SUB_PAGE2)
|
|||
|
{
|
|||
|
rdaddr = (U8 xdata *)Page2WrRdFuncTable[ucSubClassID];
|
|||
|
Uart1ReadInfo(rdaddr);
|
|||
|
}
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
714
|
|||
|
715 #if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0RdCmdProcess
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEB4A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2RdCmdProcess(void)
|
|||
|
{
|
|||
|
U8 xdata *rdaddr;
|
|||
|
|
|||
|
switch(ucUart2Buf[UART_CMD_NO])
|
|||
|
{
|
|||
|
case CELL1:
|
|||
|
case CELL2:
|
|||
|
case CELL3:
|
|||
|
case CELL4:
|
|||
|
case CELL5:
|
|||
|
case CELL6:
|
|||
|
case CELL7:
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 13
|
|||
|
|
|||
|
case CELL8:
|
|||
|
case CELL9:
|
|||
|
case CELL10:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiVCell[ucUart2Buf[UART_CMD_NO]-1]);
|
|||
|
break;
|
|||
|
|
|||
|
case TOTAL_VOLTAGE:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.ulVoltage);
|
|||
|
break;
|
|||
|
|
|||
|
case CADC_CURRENT:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.slCurr);
|
|||
|
break;
|
|||
|
|
|||
|
case EXT_TEMP1:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiTS[0]);
|
|||
|
break;
|
|||
|
|
|||
|
case EXT_TEMP2:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiTS[1]);
|
|||
|
break;
|
|||
|
|
|||
|
case DIE_TEMP1:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiICTempe[0]);
|
|||
|
break;
|
|||
|
|
|||
|
case DIE_TEMP2:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiICTempe[1]);
|
|||
|
break;
|
|||
|
|
|||
|
case FULL_CHG_CAP:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.ulFCC);
|
|||
|
break;
|
|||
|
|
|||
|
case REMAIN_CAP:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.ulRC);
|
|||
|
break;
|
|||
|
|
|||
|
case R_SOC:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiRSOC);
|
|||
|
break;
|
|||
|
|
|||
|
case CYCLE_COUNT:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiCycleCount);
|
|||
|
break;
|
|||
|
|
|||
|
case PACK_STATUS:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiPackStatus);
|
|||
|
break;
|
|||
|
|
|||
|
case BATTERY_STATUS:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiBatStatus);
|
|||
|
break;
|
|||
|
|
|||
|
case PACK_CONFIG:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiPackConfig);
|
|||
|
break;
|
|||
|
|
|||
|
case MANUFACTURE_COMMAND:
|
|||
|
Uart2ReadInfo((U8 xdata *)&Info.uiManuCommand);
|
|||
|
break;
|
|||
|
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 14
|
|||
|
|
|||
|
default: //read extern EEPRom data
|
|||
|
if(ucUart2Buf[UART_LENGTH] >= 128)
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bUart2E2PRdData = 1;
|
|||
|
}
|
|||
|
else if(ucUart2Buf[UART_CMD_NO] == SUB_PAGE1 && ucSubClassID == RTC_SUBID)
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bUart2RTCRdTime = 1;
|
|||
|
}
|
|||
|
else if(ucUart2Buf[UART_CMD_NO] == SUB_PAGE1)
|
|||
|
{
|
|||
|
rdaddr = (U8 xdata *)Page1WrRdFuncTable[ucSubClassID];
|
|||
|
Uart2ReadInfo(rdaddr);
|
|||
|
}
|
|||
|
else if(ucUart2Buf[UART_CMD_NO] == SUB_PAGE2)
|
|||
|
{
|
|||
|
rdaddr = (U8 xdata *)Page2WrRdFuncTable[ucSubClassID];
|
|||
|
Uart2ReadInfo(rdaddr);
|
|||
|
}
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
822
|
|||
|
823 #if (UART0_DEFINE != 0)
|
|||
|
824 /*************************************************************************************************
|
|||
|
825 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0CaliCurrent
|
|||
|
826 * <20><> <20><>: <20><>
|
|||
|
827 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
828 * <20><> <20><>: UART0ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>У<D0A3>ܵ<EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
829 *************************************************************************************************/
|
|||
|
830 void Uart0CaliVoltage(void)
|
|||
|
831 {
|
|||
|
832 1 if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
833 1 {
|
|||
|
834 2 ulExtVPack = ((U16)ucUart0Buf[3]<<8)|ucUart0Buf[4];
|
|||
|
835 2
|
|||
|
836 2 if(!ulExtVPack)
|
|||
|
837 2 {
|
|||
|
838 3 Uart0SendNack();
|
|||
|
839 3 }
|
|||
|
840 2 else
|
|||
|
841 2 {
|
|||
|
842 3 bCaliFlg = 1;
|
|||
|
843 3 ucExtcaliSwitch1 |= 0x01;
|
|||
|
844 3 Uart0SendAck();
|
|||
|
845 3 }
|
|||
|
846 2 }
|
|||
|
847 1 else
|
|||
|
848 1 {
|
|||
|
849 2 Uart0SendNack();
|
|||
|
850 2 }
|
|||
|
851 1 }
|
|||
|
852 #endif
|
|||
|
853
|
|||
|
854 #if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1CaliCurrent
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 15
|
|||
|
|
|||
|
* <20><> <20><>: UART1ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>У<D0A3>ܵ<EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1CaliVoltage(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
ulExtVPack = ((U16)ucUart1Buf[3]<<8)|ucUart1Buf[4];
|
|||
|
|
|||
|
if(!ulExtVPack)
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x01;
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
884
|
|||
|
885 #if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2CaliCurrent
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART2ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>У<D0A3>ܵ<EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2CaliVoltage(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
ulExtVPack = ((U16)ucUart2Buf[3]<<8)|ucUart2Buf[4];
|
|||
|
|
|||
|
if(!ulExtVPack)
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x01;
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
915
|
|||
|
916 #if (UART0_DEFINE != 0)
|
|||
|
917 /*************************************************************************************************
|
|||
|
918 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0CaliCurrent<6E><74>Uart0CaliCurOffset
|
|||
|
919 * <20><> <20><>: <20><>
|
|||
|
920 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 16
|
|||
|
|
|||
|
921 * <20><> <20><>: UART0ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>У<D0A3><D7BC><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD>&Offset<65><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
922 *************************************************************************************************/
|
|||
|
923 void Uart0CaliCurrent(void)
|
|||
|
924 {
|
|||
|
925 1 if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
926 1 {
|
|||
|
927 2 slExtCur = ((U32)ucUart0Buf[3]<<24)
|
|||
|
928 2 | ((U32)ucUart0Buf[4]<<16)
|
|||
|
929 2 | ((U32)ucUart0Buf[5]<<8)
|
|||
|
930 2 | ((U32)ucUart0Buf[6]);
|
|||
|
931 2
|
|||
|
932 2 if((!AFE.siCurr) || (!slExtCur))
|
|||
|
933 2 {
|
|||
|
934 3 Uart0SendNack();
|
|||
|
935 3 }
|
|||
|
936 2 else
|
|||
|
937 2 {
|
|||
|
938 3 bCaliFlg = 1;
|
|||
|
939 3 ucExtcaliSwitch1 |= 0x10;
|
|||
|
940 3 Uart0SendAck();
|
|||
|
941 3 }
|
|||
|
942 2 }
|
|||
|
943 1 else
|
|||
|
944 1 {
|
|||
|
945 2 Uart0SendNack();
|
|||
|
946 2 }
|
|||
|
947 1 }
|
|||
|
948
|
|||
|
949
|
|||
|
950 void Uart0CaliCurOffset(void)
|
|||
|
951 {
|
|||
|
952 1 if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
953 1 {
|
|||
|
954 2 bCaliFlg = 1; //Calibration offset Current
|
|||
|
955 2 ucExtcaliSwitch1 |= 0x20;
|
|||
|
956 2
|
|||
|
957 2 Uart0SendAck();
|
|||
|
958 2 }
|
|||
|
959 1 else
|
|||
|
960 1 {
|
|||
|
961 2 Uart0SendNack();
|
|||
|
962 2 }
|
|||
|
963 1 }
|
|||
|
964 #endif
|
|||
|
965
|
|||
|
966 #if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1CaliCurrent<6E><74>Uart1CaliCurOffset
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART1ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>У<D0A3><D7BC><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD>&Offset<65><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1CaliCurrent(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
slExtCur = ((U32)ucUart1Buf[3]<<24)
|
|||
|
| ((U32)ucUart1Buf[4]<<16)
|
|||
|
| ((U32)ucUart1Buf[5]<<8)
|
|||
|
| ((U32)ucUart1Buf[6]);
|
|||
|
|
|||
|
if((!AFE.siCurr) || (!slExtCur))
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 17
|
|||
|
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x10;
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
void Uart1CaliCurOffset(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration offset Current
|
|||
|
ucExtcaliSwitch1 |= 0x20;
|
|||
|
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
1015
|
|||
|
1016 #if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2CaliCurrent<6E><74>Uart2CaliCurOffset
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART2ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>У<D0A3><D7BC><EFBFBD><EFBFBD><EFBFBD>ɼ<EFBFBD><C9BC><EFBFBD><EFBFBD><EFBFBD>&Offset<65><74><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2CaliCurrent(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
slExtCur = ((U32)ucUart2Buf[3]<<24)
|
|||
|
| ((U32)ucUart2Buf[4]<<16)
|
|||
|
| ((U32)ucUart2Buf[5]<<8)
|
|||
|
| ((U32)ucUart2Buf[6]);
|
|||
|
|
|||
|
if((!AFE.siCurr) || (!slExtCur))
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x10;
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 18
|
|||
|
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
void Uart2CaliCurOffset(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration offset Current
|
|||
|
ucExtcaliSwitch1 |= 0x20;
|
|||
|
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
1065
|
|||
|
1066 #if (UART0_DEFINE != 0)
|
|||
|
1067 /*************************************************************************************************
|
|||
|
1068 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0CaliTS1<53><31>Uart0CaliTS2
|
|||
|
1069 * <20><> <20><>: <20><>
|
|||
|
1070 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
1071 * <20><> <20><>: UART0ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>УTS1/TS2<53><32><EFBFBD><EFBFBD>
|
|||
|
1072 *************************************************************************************************/
|
|||
|
1073 void Uart0CaliTS1(void)
|
|||
|
1074 {
|
|||
|
1075 1 if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
1076 1 {
|
|||
|
1077 2 bCaliFlg = 1; //Calibration TS1
|
|||
|
1078 2 uiExtTemp1 = ((U16)ucUart0Buf[3]<<8)|ucUart0Buf[4];
|
|||
|
1079 2 ucExtcaliSwitch1 |= 0x04;
|
|||
|
1080 2
|
|||
|
1081 2 Uart0SendAck();
|
|||
|
1082 2 }
|
|||
|
1083 1 else
|
|||
|
1084 1 {
|
|||
|
1085 2 Uart0SendNack();
|
|||
|
1086 2 }
|
|||
|
1087 1 }
|
|||
|
1088
|
|||
|
1089
|
|||
|
1090 void Uart0CaliTS2(void)
|
|||
|
1091 {
|
|||
|
1092 1 if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
1093 1 {
|
|||
|
1094 2 bCaliFlg = 1; //Calibration TS2
|
|||
|
1095 2 uiExtTemp2 = ((U16)ucUart0Buf[3]<<8)|ucUart0Buf[4];
|
|||
|
1096 2 ucExtcaliSwitch1 |= 0x08;
|
|||
|
1097 2
|
|||
|
1098 2 Uart0SendAck();
|
|||
|
1099 2 }
|
|||
|
1100 1 else
|
|||
|
1101 1 {
|
|||
|
1102 2 Uart0SendNack();
|
|||
|
1103 2 }
|
|||
|
1104 1 }
|
|||
|
1105 #endif
|
|||
|
1106
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 19
|
|||
|
|
|||
|
1107 #if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1CaliTS1<53><31>Uart1CaliTS2
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART1ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>УTS1/TS2<53><32><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1CaliTS1(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration TS1
|
|||
|
uiExtTemp1 = ((U16)ucUart1Buf[3]<<8)|ucUart1Buf[4];
|
|||
|
ucExtcaliSwitch1 |= 0x04;
|
|||
|
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
void Uart1CaliTS2(void)
|
|||
|
{
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration TS2
|
|||
|
uiExtTemp2 = ((U16)ucUart1Buf[3]<<8)|ucUart1Buf[4];
|
|||
|
ucExtcaliSwitch1 |= 0x08;
|
|||
|
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
1147
|
|||
|
1148 #if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2CaliTS1<53><31>Uart2CaliTS2
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART2ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>УTS1/TS2<53><32><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2CaliTS1(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration TS1
|
|||
|
uiExtTemp1 = ((U16)ucUart2Buf[3]<<8)|ucUart2Buf[4];
|
|||
|
ucExtcaliSwitch1 |= 0x04;
|
|||
|
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 20
|
|||
|
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
void Uart2CaliTS2(void)
|
|||
|
{
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
bCaliFlg = 1; //Calibration TS2
|
|||
|
uiExtTemp2 = ((U16)ucUart2Buf[3]<<8)|ucUart2Buf[4];
|
|||
|
ucExtcaliSwitch1 |= 0x08;
|
|||
|
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
1188
|
|||
|
1189 #if (UART0_DEFINE != 0)
|
|||
|
1190 /*************************************************************************************************
|
|||
|
1191 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0CaliRTC
|
|||
|
1192 * <20><> <20><>: <20><>
|
|||
|
1193 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
1194 * <20><> <20><>: UART0ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>УRTC<54><43><EFBFBD><EFBFBD>
|
|||
|
1195 *************************************************************************************************/
|
|||
|
1196 void Uart0CaliRTC(void)
|
|||
|
1197 {
|
|||
|
1198 1 U8 i;
|
|||
|
1199 1
|
|||
|
1200 1 if(ucUart0Buf[3+ucUart0Buf[UART_LENGTH]] == CRC8cal(&ucUart0Buf, ucUart0Buf[UART_LENGTH]+3))
|
|||
|
1201 1 {
|
|||
|
1202 2 for(i=0; i<7; i++)
|
|||
|
1203 2 {
|
|||
|
1204 3 ucExtRTC[i] = ucUart0Buf[3+i];
|
|||
|
1205 3 }
|
|||
|
1206 2 bCaliFlg = 1;
|
|||
|
1207 2 ucExtcaliSwitch1 |= 0x80;
|
|||
|
1208 2 Uart0SendAck();
|
|||
|
1209 2 }
|
|||
|
1210 1 else
|
|||
|
1211 1 {
|
|||
|
1212 2 Uart0SendNack();
|
|||
|
1213 2 }
|
|||
|
1214 1 }
|
|||
|
1215 #endif
|
|||
|
1216
|
|||
|
1217 #if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1CaliRTC
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART1ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>УRTC<54><43><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1CaliRTC(void)
|
|||
|
{
|
|||
|
U8 i;
|
|||
|
|
|||
|
if(ucUart1Buf[3+ucUart1Buf[UART_LENGTH]] == CRC8cal(&ucUart1Buf, ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
for(i=0; i<7; i++)
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 21
|
|||
|
|
|||
|
{
|
|||
|
ucExtRTC[i] = ucUart1Buf[3+i];
|
|||
|
}
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x80;
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
1244
|
|||
|
1245 #if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2CaliRTC
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART2ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD>УRTC<54><43><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2CaliRTC(void)
|
|||
|
{
|
|||
|
U8 i;
|
|||
|
|
|||
|
if(ucUart2Buf[3+ucUart2Buf[UART_LENGTH]] == CRC8cal(&ucUart2Buf, ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
for(i=0; i<7; i++)
|
|||
|
{
|
|||
|
ucExtRTC[i] = ucUart2Buf[3+i];
|
|||
|
}
|
|||
|
bCaliFlg = 1;
|
|||
|
ucExtcaliSwitch1 |= 0x80;
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
1272
|
|||
|
1273 #if (UART0_DEFINE != 0)
|
|||
|
1274 /*************************************************************************************************
|
|||
|
1275 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0WrCmdProcess
|
|||
|
1276 * <20><> <20><>: <20><>
|
|||
|
1277 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
1278 * <20><> <20><>: UART0д<30><D0B4><EFBFBD><EFBFBD><EEB4A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
1279 *************************************************************************************************/
|
|||
|
1280 void Uart0WrCmdProcess(void)
|
|||
|
1281 {
|
|||
|
1282 1 U8 xdata *rdaddr;
|
|||
|
1283 1 switch(ucUart0Buf[UART_CMD_NO])
|
|||
|
1284 1 {
|
|||
|
1285 2 case MANUFACTURE_COMMAND:
|
|||
|
1286 2 Uart0WriteManufacture();
|
|||
|
1287 2 break;
|
|||
|
1288 2 case DATA_FLASH_COMMAND:
|
|||
|
1289 2 Uart0ReadSubClassID(); //accept command is dataflashcommand 0x77
|
|||
|
1290 2 break;
|
|||
|
1291 2 case CALI_CUR_COMMAND:
|
|||
|
1292 2 Uart0CaliCurrent();
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 22
|
|||
|
|
|||
|
1293 2 break;
|
|||
|
1294 2 case CALI_VOL_COMMAND:
|
|||
|
1295 2 Uart0CaliVoltage();
|
|||
|
1296 2 break;
|
|||
|
1297 2 case CALI_ZERO_CUR_COMMAND:
|
|||
|
1298 2 Uart0CaliCurOffset();
|
|||
|
1299 2 break;
|
|||
|
1300 2 case CALI_TS1_COMMAND:
|
|||
|
1301 2 Uart0CaliTS1();
|
|||
|
1302 2 break;
|
|||
|
1303 2 case CALI_TS2_COMMAND:
|
|||
|
1304 2 Uart0CaliTS2();
|
|||
|
1305 2 break;
|
|||
|
1306 2
|
|||
|
1307 2 case CALI_RTC_COMMAND:
|
|||
|
1308 2 Uart0CaliRTC();
|
|||
|
1309 2 break;
|
|||
|
1310 2 case SUB_PAGE1:
|
|||
|
1311 2 rdaddr = (U8 xdata *)Page1WrRdFuncTable[ucSubClassID];
|
|||
|
1312 2 Uart0WriteInfo(rdaddr);
|
|||
|
1313 2 break;
|
|||
|
1314 2 case SUB_PAGE2:
|
|||
|
1315 2 rdaddr = (U8 xdata *)Page2WrRdFuncTable[ucSubClassID];
|
|||
|
1316 2 Uart0WriteInfo(rdaddr);
|
|||
|
1317 2 break;
|
|||
|
1318 2
|
|||
|
1319 2 case CMD_E2PROM_ERASE:
|
|||
|
1320 2 if(ucUart0Buf[UART_DATA] == 0x55) //Testing equipment is properly
|
|||
|
1321 2 {
|
|||
|
1322 3 bE2PProcessFlg = 1;
|
|||
|
1323 3 bE2PErase = 1;
|
|||
|
1324 3 Uart0SendAck();
|
|||
|
1325 3 }
|
|||
|
1326 2 else
|
|||
|
1327 2 {
|
|||
|
1328 3 Uart0SendNack();
|
|||
|
1329 3 }
|
|||
|
1330 2 break;
|
|||
|
1331 2 }
|
|||
|
1332 1 }
|
|||
|
1333 #endif
|
|||
|
1334
|
|||
|
1335 #if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1WrCmdProcess
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART1д<31><D0B4><EFBFBD><EFBFBD><EEB4A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1WrCmdProcess(void)
|
|||
|
{
|
|||
|
U8 xdata *rdaddr;
|
|||
|
switch(ucUart1Buf[UART_CMD_NO])
|
|||
|
{
|
|||
|
case MANUFACTURE_COMMAND:
|
|||
|
Uart1WriteManufacture();
|
|||
|
break;
|
|||
|
case DATA_FLASH_COMMAND:
|
|||
|
Uart1ReadSubClassID(); //accept command is dataflashcommand 0x77
|
|||
|
break;
|
|||
|
case CALI_CUR_COMMAND:
|
|||
|
Uart1CaliCurrent();
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 23
|
|||
|
|
|||
|
break;
|
|||
|
case CALI_VOL_COMMAND:
|
|||
|
Uart1CaliVoltage();
|
|||
|
break;
|
|||
|
case CALI_ZERO_CUR_COMMAND:
|
|||
|
Uart1CaliCurOffset();
|
|||
|
break;
|
|||
|
case CALI_TS1_COMMAND:
|
|||
|
Uart1CaliTS1();
|
|||
|
break;
|
|||
|
case CALI_TS2_COMMAND:
|
|||
|
Uart1CaliTS2();
|
|||
|
break;
|
|||
|
|
|||
|
case CALI_RTC_COMMAND:
|
|||
|
Uart1CaliRTC();
|
|||
|
break;
|
|||
|
case SUB_PAGE1:
|
|||
|
rdaddr = (U8 xdata *)Page1WrRdFuncTable[ucSubClassID];
|
|||
|
Uart1WriteInfo(rdaddr);
|
|||
|
break;
|
|||
|
case SUB_PAGE2:
|
|||
|
rdaddr = (U8 xdata *)Page2WrRdFuncTable[ucSubClassID];
|
|||
|
Uart1WriteInfo(rdaddr);
|
|||
|
break;
|
|||
|
|
|||
|
case CMD_E2PROM_ERASE:
|
|||
|
if(ucUart1Buf[UART_DATA] == 0x55) //Testing equipment is properly
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bE2PErase = 1;
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart1SendNack();
|
|||
|
}
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
1396
|
|||
|
1397 #if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2WrCmdProcess
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART2д<32><D0B4><EFBFBD><EFBFBD><EEB4A6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2WrCmdProcess(void)
|
|||
|
{
|
|||
|
U8 xdata *rdaddr;
|
|||
|
switch(ucUart2Buf[UART_CMD_NO])
|
|||
|
{
|
|||
|
case MANUFACTURE_COMMAND:
|
|||
|
Uart2WriteManufacture();
|
|||
|
break;
|
|||
|
case DATA_FLASH_COMMAND:
|
|||
|
Uart2ReadSubClassID(); //accept command is dataflashcommand 0x77
|
|||
|
break;
|
|||
|
case CALI_CUR_COMMAND:
|
|||
|
Uart2CaliCurrent();
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 24
|
|||
|
|
|||
|
break;
|
|||
|
case CALI_VOL_COMMAND:
|
|||
|
Uart2CaliVoltage();
|
|||
|
break;
|
|||
|
case CALI_ZERO_CUR_COMMAND:
|
|||
|
Uart2CaliCurOffset();
|
|||
|
break;
|
|||
|
case CALI_TS1_COMMAND:
|
|||
|
Uart2CaliTS1();
|
|||
|
break;
|
|||
|
case CALI_TS2_COMMAND:
|
|||
|
Uart2CaliTS2();
|
|||
|
break;
|
|||
|
|
|||
|
case CALI_RTC_COMMAND:
|
|||
|
Uart2CaliRTC();
|
|||
|
break;
|
|||
|
case SUB_PAGE1:
|
|||
|
rdaddr = (U8 xdata *)Page1WrRdFuncTable[ucSubClassID];
|
|||
|
Uart2WriteInfo(rdaddr);
|
|||
|
break;
|
|||
|
case SUB_PAGE2:
|
|||
|
rdaddr = (U8 xdata *)Page2WrRdFuncTable[ucSubClassID];
|
|||
|
Uart2WriteInfo(rdaddr);
|
|||
|
break;
|
|||
|
|
|||
|
case CMD_E2PROM_ERASE:
|
|||
|
if(ucUart2Buf[UART_DATA] == 0x55) //Testing equipment is properly
|
|||
|
{
|
|||
|
bE2PProcessFlg = 1;
|
|||
|
bE2PErase = 1;
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
Uart2SendNack();
|
|||
|
}
|
|||
|
break;
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
1458
|
|||
|
1459 #if (UART0_DEFINE != 0)
|
|||
|
1460 /*************************************************************************************************
|
|||
|
1461 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart0IapCheckHandshake
|
|||
|
1462 * <20><> <20><>: <20><>
|
|||
|
1463 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
1464 * <20><> <20><>: IAP<41><50>ISP<53><50><EFBFBD><EFBFBD>Э<EFBFBD><D0AD>
|
|||
|
1465 *************************************************************************************************/
|
|||
|
1466 void Uart0IapCheckHandshake(void)
|
|||
|
1467 {
|
|||
|
1468 1 U8 i, databak;
|
|||
|
1469 1 U16 checksum = 0;
|
|||
|
1470 1
|
|||
|
1471 1 if(ucUart0BufPT == 2)
|
|||
|
1472 1 {
|
|||
|
1473 2 if(ucUart0Buf[HEARD2] != 0xA5)
|
|||
|
1474 2 {
|
|||
|
1475 3 ucUart0BufPT = 0;
|
|||
|
1476 3 }
|
|||
|
1477 2 else
|
|||
|
1478 2 {
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 25
|
|||
|
|
|||
|
1479 3 uiReceCheckSum = 0; //֡ͷ<D6A1>ж<EFBFBD><D0B6><EFBFBD>ȷ
|
|||
|
1480 3 ucUartErrCode = 0;
|
|||
|
1481 3 }
|
|||
|
1482 2 }
|
|||
|
1483 1 else
|
|||
|
1484 1 {
|
|||
|
1485 2 if(ucUart0BufPT < (ucUart0Buf[LENGTH]+9))
|
|||
|
1486 2 {
|
|||
|
1487 3 if(ucUart0BufPT <= (ucUart0Buf[LENGTH]+7))
|
|||
|
1488 3 {
|
|||
|
1489 4 uiReceCheckSum += ucUart0Buf[ucUart0BufPT-1];
|
|||
|
1490 4 }
|
|||
|
1491 3 if(ucUart0BufPT == (TARGET+1)) //<2F><><EFBFBD><EFBFBD>ID
|
|||
|
1492 3 {
|
|||
|
1493 4 if(ucUart0Buf[TARGET] != IAP_BMSID)
|
|||
|
1494 4 {
|
|||
|
1495 5 ucUart0BufPT = 0;
|
|||
|
1496 5 }
|
|||
|
1497 4 }
|
|||
|
1498 3 else if(ucUart0BufPT == (COMMAND+1)) //<2F><><EFBFBD><EFBFBD>COMMAND
|
|||
|
1499 3 {
|
|||
|
1500 4 if((ucUart0Buf[COMMAND] != IAP_CMD_HANDSHAKE))
|
|||
|
1501 4 {
|
|||
|
1502 5 ucUartErrCode |= IAPERROR_CMD;
|
|||
|
1503 5 }
|
|||
|
1504 4 }
|
|||
|
1505 3 }
|
|||
|
1506 2 else
|
|||
|
1507 2 {
|
|||
|
1508 3 ucUart0BufPT = 0;
|
|||
|
1509 3 if(uiReceCheckSum != ((ucUart0Buf[ucUart0Buf[LENGTH]+8]<<8) + ucUart0Buf[ucUart0Buf[LENGTH]+7]))
|
|||
|
1510 3 {
|
|||
|
1511 4 ucUartErrCode |= IAPERROR_CHECKSUM;
|
|||
|
1512 4 }
|
|||
|
1513 3
|
|||
|
1514 3 if(ucUartErrCode != 0) //<2F><><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEB4A6>
|
|||
|
1515 3 {
|
|||
|
1516 4 ucUart0Buf[INDEXES] = ucUartErrCode;
|
|||
|
1517 4 }
|
|||
|
1518 3 else
|
|||
|
1519 3 {
|
|||
|
1520 4 bISPFlg = 1; //<2F><>ת<EFBFBD><D7AA>BOOT<4F><54>
|
|||
|
1521 4 ucUart0Buf[INDEXES] = 0;
|
|||
|
1522 4 }
|
|||
|
1523 3
|
|||
|
1524 3 ucUart0Buf[LENGTH] = 0;
|
|||
|
1525 3 ucUart0Buf[COMMAND] = 0x0B;
|
|||
|
1526 3
|
|||
|
1527 3 databak = ucUart0Buf[SOURCE]; //<2F><><EFBFBD><EFBFBD>ԴID<49><44>Ŀ<EFBFBD><C4BF>ID
|
|||
|
1528 3 ucUart0Buf[SOURCE] = ucUart0Buf[TARGET];
|
|||
|
1529 3 ucUart0Buf[TARGET] = databak;
|
|||
|
1530 3
|
|||
|
1531 3 for(i=2; i<(ucUart0Buf[LENGTH]+7); i++)
|
|||
|
1532 3 {
|
|||
|
1533 4 checksum += ucUart0Buf[i];
|
|||
|
1534 4 }
|
|||
|
1535 3
|
|||
|
1536 3 ucUart0Buf[7+ucUart0Buf[LENGTH]] = checksum%256;
|
|||
|
1537 3 ucUart0Buf[8+ucUart0Buf[LENGTH]] = checksum/256;
|
|||
|
1538 3
|
|||
|
1539 3 Uart0SendAck();
|
|||
|
1540 3 }
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 26
|
|||
|
|
|||
|
1541 2 }
|
|||
|
1542 1 }
|
|||
|
1543 #endif
|
|||
|
1544
|
|||
|
1545 #if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart1IapCheckHandshake
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: IAP<41><50>ISP<53><50><EFBFBD><EFBFBD>Э<EFBFBD><D0AD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1IapCheckHandshake(void)
|
|||
|
{
|
|||
|
U8 i, databak;
|
|||
|
U16 checksum = 0;
|
|||
|
|
|||
|
if(ucUart1BufPT == 2)
|
|||
|
{
|
|||
|
if(ucUart1Buf[HEARD2] != 0xA5)
|
|||
|
{
|
|||
|
ucUart1BufPT = 0;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
uiReceCheckSum = 0; //֡ͷ<D6A1>ж<EFBFBD><D0B6><EFBFBD>ȷ
|
|||
|
ucUartErrCode = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
if(ucUart1BufPT < (ucUart1Buf[LENGTH]+9))
|
|||
|
{
|
|||
|
if(ucUart1BufPT <= (ucUart1Buf[LENGTH]+7))
|
|||
|
{
|
|||
|
uiReceCheckSum += ucUart1Buf[ucUart1BufPT-1];
|
|||
|
}
|
|||
|
if(ucUart1BufPT == (TARGET+1)) //<2F><><EFBFBD><EFBFBD>ID
|
|||
|
{
|
|||
|
if(ucUart1Buf[TARGET] != IAP_BMSID)
|
|||
|
{
|
|||
|
ucUart1BufPT = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else if(ucUart1BufPT == (COMMAND+1)) //<2F><><EFBFBD><EFBFBD>COMMAND
|
|||
|
{
|
|||
|
if((ucUart1Buf[COMMAND] != IAP_CMD_HANDSHAKE))
|
|||
|
{
|
|||
|
ucUartErrCode |= IAPERROR_CMD;
|
|||
|
}
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart1BufPT = 0;
|
|||
|
if(uiReceCheckSum != ((ucUart1Buf[ucUart1Buf[LENGTH]+8]<<8) + ucUart1Buf[ucUart1Buf[LENGTH]+7]))
|
|||
|
{
|
|||
|
ucUartErrCode |= IAPERROR_CHECKSUM;
|
|||
|
}
|
|||
|
|
|||
|
if(ucUartErrCode != 0) //<2F><><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEB4A6>
|
|||
|
{
|
|||
|
ucUart1Buf[INDEXES] = ucUartErrCode;
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 27
|
|||
|
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bISPFlg = 1; //<2F><>ת<EFBFBD><D7AA>BOOT<4F><54>
|
|||
|
ucUart1Buf[INDEXES] = 0;
|
|||
|
}
|
|||
|
|
|||
|
ucUart1Buf[LENGTH] = 0;
|
|||
|
ucUart1Buf[COMMAND] = 0x0B;
|
|||
|
|
|||
|
databak = ucUart1Buf[SOURCE]; //<2F><><EFBFBD><EFBFBD>ԴID<49><44>Ŀ<EFBFBD><C4BF>ID
|
|||
|
ucUart1Buf[SOURCE] = ucUart1Buf[TARGET];
|
|||
|
ucUart1Buf[TARGET] = databak;
|
|||
|
|
|||
|
for(i=2; i<(ucUart1Buf[LENGTH]+7); i++)
|
|||
|
{
|
|||
|
checksum += ucUart1Buf[i];
|
|||
|
}
|
|||
|
|
|||
|
ucUart1Buf[7+ucUart1Buf[LENGTH]] = checksum%256;
|
|||
|
ucUart1Buf[8+ucUart1Buf[LENGTH]] = checksum/256;
|
|||
|
|
|||
|
Uart1SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
1630
|
|||
|
1631 #if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: Uart2IapCheckHandshake
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: IAP<41><50>ISP<53><50><EFBFBD><EFBFBD>Э<EFBFBD><D0AD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2IapCheckHandshake(void)
|
|||
|
{
|
|||
|
U8 i, databak;
|
|||
|
U16 checksum = 0;
|
|||
|
|
|||
|
if(ucUart2BufPT == 2)
|
|||
|
{
|
|||
|
if(ucUart2Buf[HEARD2] != 0xA5)
|
|||
|
{
|
|||
|
ucUart2BufPT = 0;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
uiReceCheckSum = 0; //֡ͷ<D6A1>ж<EFBFBD><D0B6><EFBFBD>ȷ
|
|||
|
ucUartErrCode = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
if(ucUart2BufPT < (ucUart2Buf[LENGTH]+9))
|
|||
|
{
|
|||
|
if(ucUart2BufPT <= (ucUart2Buf[LENGTH]+7))
|
|||
|
{
|
|||
|
uiReceCheckSum += ucUart2Buf[ucUart2BufPT-1];
|
|||
|
}
|
|||
|
if(ucUart2BufPT == (TARGET+1)) //<2F><><EFBFBD><EFBFBD>ID
|
|||
|
{
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 28
|
|||
|
|
|||
|
if(ucUart2Buf[TARGET] != IAP_BMSID)
|
|||
|
{
|
|||
|
ucUart2BufPT = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else if(ucUart2BufPT == (COMMAND+1)) //<2F><><EFBFBD><EFBFBD>COMMAND
|
|||
|
{
|
|||
|
if((ucUart2Buf[COMMAND] != IAP_CMD_HANDSHAKE))
|
|||
|
{
|
|||
|
ucUartErrCode |= IAPERROR_CMD;
|
|||
|
}
|
|||
|
}
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart2BufPT = 0;
|
|||
|
if(uiReceCheckSum != ((ucUart2Buf[ucUart2Buf[LENGTH]+8]<<8) + ucUart2Buf[ucUart2Buf[LENGTH]+7]))
|
|||
|
{
|
|||
|
ucUartErrCode |= IAPERROR_CHECKSUM;
|
|||
|
}
|
|||
|
|
|||
|
if(ucUartErrCode != 0) //<2F><><EFBFBD><EFBFBD><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ִ<EFBFBD><D6B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EEB4A6>
|
|||
|
{
|
|||
|
ucUart2Buf[INDEXES] = ucUartErrCode;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bISPFlg = 1; //<2F><>ת<EFBFBD><D7AA>BOOT<4F><54>
|
|||
|
ucUart2Buf[INDEXES] = 0;
|
|||
|
}
|
|||
|
|
|||
|
ucUart2Buf[LENGTH] = 0;
|
|||
|
ucUart2Buf[COMMAND] = 0x0B;
|
|||
|
|
|||
|
databak = ucUart2Buf[SOURCE]; //<2F><><EFBFBD><EFBFBD>ԴID<49><44>Ŀ<EFBFBD><C4BF>ID
|
|||
|
ucUart2Buf[SOURCE] = ucUart2Buf[TARGET];
|
|||
|
ucUart2Buf[TARGET] = databak;
|
|||
|
|
|||
|
for(i=2; i<(ucUart2Buf[LENGTH]+7); i++)
|
|||
|
{
|
|||
|
checksum += ucUart2Buf[i];
|
|||
|
}
|
|||
|
|
|||
|
ucUart2Buf[7+ucUart2Buf[LENGTH]] = checksum%256;
|
|||
|
ucUart2Buf[8+ucUart2Buf[LENGTH]] = checksum/256;
|
|||
|
|
|||
|
Uart2SendAck();
|
|||
|
}
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
1716
|
|||
|
1717 #if (UART0_DEFINE != 0)
|
|||
|
1718 /*************************************************************************************************
|
|||
|
1719 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart0AppRx
|
|||
|
1720 * <20><> <20><>: RxData<74><61>Uart0<74><30><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>SBUF0<46><30>ȡ
|
|||
|
1721 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
1722 * <20><> <20><>: UART<52><54><EFBFBD><EFBFBD><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<D3BF><DAA3>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<C3B8><C3BA><EFBFBD>
|
|||
|
1723 ucUart0Buf[0]--Slave Addr
|
|||
|
1724 ucUart0Buf[1]--CMD No.
|
|||
|
1725 ucUart0Buf[2]--Offset
|
|||
|
1726 ucUart0Buf[3]--Data Length
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 29
|
|||
|
|
|||
|
1727 ucUart0Buf[4...]--Data
|
|||
|
1728 *************************************************************************************************/
|
|||
|
1729 void InterruptUart0AppRx(U8 RxData)
|
|||
|
1730 {
|
|||
|
1731 1 ucUart0Buf[ucUart0BufPT] = RxData;
|
|||
|
1732 1 ucUart0BufPT++;
|
|||
|
1733 1 if(ucUart0BufPT >= 140)
|
|||
|
1734 1 {
|
|||
|
1735 2 ucUart0BufPT = 0;
|
|||
|
1736 2 }
|
|||
|
1737 1 if(ucUart0BufPT == 1)
|
|||
|
1738 1 {
|
|||
|
1739 2 if((ucUart0Buf[UART_SLAVE_ADDR]&0xFE) == SADDR) //<2F><><EFBFBD>յĵ<D5B5>һ<EFBFBD><D2BB><EFBFBD>ֽ<EFBFBD><D6BD>Ƿ<EFBFBD><C7B7><EFBFBD>UART<52><54>ַƥ<D6B7><C6A5>
|
|||
|
1740 2 {
|
|||
|
1741 3 if((ucUart0Buf[UART_SLAVE_ADDR]&0x01)==0) //bit7<74><37>R/W<><57>־<EFBFBD><D6BE>0--R, 1--W
|
|||
|
1742 3 {
|
|||
|
1743 4 bUart0ReadFlg = 1;
|
|||
|
1744 4 bUart0WriteFlg = 0;
|
|||
|
1745 4 }
|
|||
|
1746 3 else
|
|||
|
1747 3 {
|
|||
|
1748 4 bUart0WriteFlg = 1;
|
|||
|
1749 4 bUart0ReadFlg = 0;
|
|||
|
1750 4 }
|
|||
|
1751 3 }
|
|||
|
1752 2 else if(ucUart0Buf[HEARD1] != 0x5A) //<2F>ж<EFBFBD><D0B6>Ƿ<EFBFBD>ΪIAP/ISP<53><50><EFBFBD><EFBFBD>ʼ֡
|
|||
|
1753 2 {
|
|||
|
1754 3 ucUart0BufPT = 0; //<2F><><EFBFBD><EFBFBD>֡ͷ<D6A1><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λָ<CEBB><D6B8>
|
|||
|
1755 3 }
|
|||
|
1756 2 }
|
|||
|
1757 1
|
|||
|
1758 1 if(bUart0ReadFlg)
|
|||
|
1759 1 {
|
|||
|
1760 2 if(ucUart0BufPT==3)
|
|||
|
1761 2 {
|
|||
|
1762 3 Uart0RdCmdProcess(); //Read the command process
|
|||
|
1763 3 }
|
|||
|
1764 2 }
|
|||
|
1765 1 else if(bUart0WriteFlg)
|
|||
|
1766 1 {
|
|||
|
1767 2 if(ucUart0BufPT > (ucUart0Buf[UART_LENGTH]+3)) //If a write operation, and complete all the d
|
|||
|
-ata has been received
|
|||
|
1768 2 {
|
|||
|
1769 3 Uart0WrCmdProcess(); //Write the command peocess
|
|||
|
1770 3 bUart0WriteFlg = 0; //PC write MCU communiaction over
|
|||
|
1771 3 ucUart0BufPT = 0;
|
|||
|
1772 3 }
|
|||
|
1773 2 }
|
|||
|
1774 1 else //<2F>Ƕ<EFBFBD><C7B6><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ΪISP<53><50><EFBFBD><EFBFBD>IAP<41><50>begin<69><6E><EFBFBD><EFBFBD>
|
|||
|
1775 1 {
|
|||
|
1776 2 Uart0IapCheckHandshake();
|
|||
|
1777 2 }
|
|||
|
1778 1 bUart0SndAckFlg = 0;
|
|||
|
1779 1
|
|||
|
1780 1 ucSleepTimerCnt = 0; //UART<52><54><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CDB9>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>UART<52><54>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
|||
|
1781 1 ucPDTimerCnt = 0;
|
|||
|
1782 1 ucUart0TimeoutCnt = 0;
|
|||
|
1783 1 }
|
|||
|
1784
|
|||
|
1785
|
|||
|
1786 /*************************************************************************************************
|
|||
|
1787 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart0AppTx
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 30
|
|||
|
|
|||
|
1788 * <20><> <20><>: <20><>
|
|||
|
1789 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
1790 * <20><> <20><>: UART0<54><30><EFBFBD><EFBFBD><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<D3BF><DAA3>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<C3B8><C3BA><EFBFBD>
|
|||
|
1791 *************************************************************************************************/
|
|||
|
1792 void InterruptUart0AppTx(void)
|
|||
|
1793 {
|
|||
|
1794 1 if((ucUart0Buf[HEARD1] == 0x5A) && (ucUart0Buf[HEARD2] == 0xA5) || bISPFlg)
|
|||
|
1795 1 {
|
|||
|
1796 2 if(ucUart0BufPT >= (ucUart0Buf[LENGTH]+8))
|
|||
|
1797 2 {
|
|||
|
1798 3 Uart0RxEn(); //Allow UART receive data
|
|||
|
1799 3 ucUart0BufPT = 0;
|
|||
|
1800 3 bUart0ReadFlg = 0; //PC read MCU communication over
|
|||
|
1801 3 ucUart0Buf[0] = 0;
|
|||
|
1802 3 ucUart0Buf[1] = 0;
|
|||
|
1803 3 ucUart0Buf[2] = 0;
|
|||
|
1804 3 ucUart0Buf[3] = 0;
|
|||
|
1805 3 bUart0SndAckFlg = 1;
|
|||
|
1806 3 }
|
|||
|
1807 2 else
|
|||
|
1808 2 {
|
|||
|
1809 3 ucUart0BufPT++;
|
|||
|
1810 3 Uart0TxEn(ucUart0Buf[ucUart0BufPT]); //20220620
|
|||
|
1811 3 }
|
|||
|
1812 2 }
|
|||
|
1813 1 else if((ucUart0BufPT==0) || (ucUart0BufPT>=ucUart0Buf[UART_LENGTH]+3))
|
|||
|
1814 1 {
|
|||
|
1815 2 Uart0RxEn(); //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
1816 2 ucUart0BufPT = 0;
|
|||
|
1817 2 bUart0ReadFlg = 0;
|
|||
|
1818 2 ucUart0Buf[0] = 0;
|
|||
|
1819 2 ucUart0Buf[1] = 0;
|
|||
|
1820 2 ucUart0Buf[2] = 0;
|
|||
|
1821 2 ucUart0Buf[3] = 0;
|
|||
|
1822 2 bUart0SndAckFlg = 1; //UART<52>ѷ<EFBFBD><D1B7><EFBFBD><CDB9><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>A
|
|||
|
-CK<43><4B><EFBFBD>ܽ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD>
|
|||
|
1823 2 }
|
|||
|
1824 1 else
|
|||
|
1825 1 {
|
|||
|
1826 2 ucUart0BufPT++;
|
|||
|
1827 2 Uart0TxEn(ucUart0Buf[ucUart0BufPT]);
|
|||
|
1828 2 }
|
|||
|
1829 1
|
|||
|
1830 1 ucSleepTimerCnt = 0; //UART<52><54><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CDB9>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>UART<52><54>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
|||
|
1831 1 ucPDTimerCnt = 0;
|
|||
|
1832 1 ucUart0TimeoutCnt = 0;
|
|||
|
1833 1 }
|
|||
|
1834
|
|||
|
1835
|
|||
|
1836 /*************************************************************************************************
|
|||
|
1837 * <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart0AppTx
|
|||
|
1838 * <20><> <20><>: <20><>
|
|||
|
1839 * <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
1840 * <20><> <20><>: UART0<54><30><EFBFBD><EFBFBD><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<D3BF><DAA3>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<C3B8><C3BA><EFBFBD>
|
|||
|
1841 *************************************************************************************************/
|
|||
|
1842 void Uart0Check(void)
|
|||
|
1843 {
|
|||
|
1844 1 if(++ucUart0TimeoutCnt >= 4) //<2F><><EFBFBD><EFBFBD>4*50mSû<53><C3BB>UARTͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λָ<CEBB><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
-<2D>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
|||
|
1845 1 {
|
|||
|
1846 2 ucUart0TimeoutCnt = 0;
|
|||
|
1847 2 ucUart0BufPT = 0;
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 31
|
|||
|
|
|||
|
1848 2 Uart0RxEn(); //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
1849 2 }
|
|||
|
1850 1 }
|
|||
|
1851 #endif
|
|||
|
1852
|
|||
|
1853 #if (UART1_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart1AppRx
|
|||
|
* <20><> <20><>: RxData<74><61>Uart1<74><31><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>SBUF1<46><31>ȡ
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART1<54><31><EFBFBD><EFBFBD><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<D3BF><DAA3>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<C3B8><C3BA><EFBFBD>
|
|||
|
ucUart1Buf[0]--Slave Addr
|
|||
|
ucUart1Buf[1]--CMD No.
|
|||
|
ucUart1Buf[2]--Offset
|
|||
|
ucUart1Buf[3]--Data Length
|
|||
|
ucUart1Buf[4...]--Data
|
|||
|
*************************************************************************************************/
|
|||
|
void InterruptUart1AppRx(U8 RxData)
|
|||
|
{
|
|||
|
ucUart1Buf[ucUart1BufPT] = RxData;
|
|||
|
ucUart1BufPT++;
|
|||
|
if(ucUart1BufPT >= 140)
|
|||
|
{
|
|||
|
ucUart1BufPT = 0;
|
|||
|
}
|
|||
|
if(ucUart1BufPT == 1)
|
|||
|
{
|
|||
|
McuBank1Sel();
|
|||
|
if((ucUart1Buf[UART_SLAVE_ADDR]&0xFE) == SADDR1) //<2F><><EFBFBD>յĵ<D5B5>һ<EFBFBD><D2BB><EFBFBD>ֽ<EFBFBD><D6BD>Ƿ<EFBFBD><C7B7><EFBFBD>UART<52><54>ַƥ<D6B7><C6A5>
|
|||
|
{
|
|||
|
McuBank0Sel();
|
|||
|
if((ucUart1Buf[UART_SLAVE_ADDR]&0x01)==0) //bit7<74><37>R/W<><57>־<EFBFBD><D6BE>0--R, 1--W
|
|||
|
{
|
|||
|
bUart1ReadFlg = 1;
|
|||
|
bUart1WriteFlg = 0;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bUart1WriteFlg = 1;
|
|||
|
bUart1ReadFlg = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else if(ucUart1Buf[HEARD1] != 0x5A) //<2F>ж<EFBFBD><D0B6>Ƿ<EFBFBD>ΪIAP/ISP<53><50><EFBFBD><EFBFBD>ʼ֡
|
|||
|
{
|
|||
|
ucUart1BufPT = 0; //<2F><><EFBFBD><EFBFBD>֡ͷ<D6A1><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λָ<CEBB><D6B8>
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
if(bUart1ReadFlg)
|
|||
|
{
|
|||
|
if(ucUart1BufPT==3)
|
|||
|
{
|
|||
|
Uart1RdCmdProcess(); //Read the command process
|
|||
|
}
|
|||
|
}
|
|||
|
else if (bUart1WriteFlg)
|
|||
|
{
|
|||
|
if(ucUart1BufPT > (ucUart1Buf[UART_LENGTH]+3)) //If a write operation, and complete all the d
|
|||
|
-ata has been received
|
|||
|
{
|
|||
|
Uart1WrCmdProcess(); //Write the command peocess
|
|||
|
bUart1WriteFlg = 0; //PC write MCU communiaction over
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 32
|
|||
|
|
|||
|
ucUart1BufPT = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else //<2F>Ƕ<EFBFBD><C7B6><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ΪISP<53><50><EFBFBD><EFBFBD>IAP<41><50>begin<69><6E><EFBFBD><EFBFBD>
|
|||
|
{
|
|||
|
Uart1IapCheckHandshake();
|
|||
|
}
|
|||
|
bUart1SndAckFlg = 0;
|
|||
|
|
|||
|
ucSleepTimerCnt = 0; //UART<52><54><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CDB9>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>UART<52><54>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
|||
|
ucPDTimerCnt = 0;
|
|||
|
ucUart1TimeoutCnt = 0;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart1AppTx
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART1<54><31><EFBFBD><EFBFBD><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<D3BF><DAA3>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<C3B8><C3BA><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void InterruptUart1AppTx(void)
|
|||
|
{
|
|||
|
if((ucUart1Buf[HEARD1] == 0x5A) && (ucUart1Buf[HEARD2] == 0xA5) || bISPFlg)
|
|||
|
{
|
|||
|
if(ucUart1BufPT >= (ucUart1Buf[LENGTH]+8))
|
|||
|
{
|
|||
|
Uart1RxEn(); //Allow UART receive data
|
|||
|
ucUart1BufPT = 0;
|
|||
|
bUart1ReadFlg = 0; //PC read MCU communication over
|
|||
|
ucUart1Buf[0] = 0;
|
|||
|
ucUart1Buf[1] = 0;
|
|||
|
ucUart1Buf[2] = 0;
|
|||
|
ucUart1Buf[3] = 0;
|
|||
|
bUart1SndAckFlg = 1;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart1BufPT++;
|
|||
|
Uart1TxEn(ucUart1Buf[ucUart1BufPT]); //20220620
|
|||
|
}
|
|||
|
}
|
|||
|
else if((ucUart1BufPT==0) || (ucUart1BufPT>=ucUart1Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
Uart1RxEn(); //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
ucUart1BufPT = 0;
|
|||
|
bUart1ReadFlg = 0;
|
|||
|
ucUart1Buf[0] = 0;
|
|||
|
ucUart1Buf[1] = 0;
|
|||
|
ucUart1Buf[2] = 0;
|
|||
|
ucUart1Buf[3] = 0;
|
|||
|
bUart1SndAckFlg = 1; //UART<52>ѷ<EFBFBD><D1B7><EFBFBD><CDB9><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>A
|
|||
|
-CK<43><4B><EFBFBD>ܽ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD>
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart1BufPT++;
|
|||
|
Uart1TxEn(ucUart1Buf[ucUart1BufPT]);
|
|||
|
}
|
|||
|
|
|||
|
ucSleepTimerCnt = 0; //UART<52><54><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CDB9>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>UART<52><54>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
|||
|
ucPDTimerCnt = 0;
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 33
|
|||
|
|
|||
|
ucUart1TimeoutCnt = 0;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart1AppTx
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART1<54><31><EFBFBD><EFBFBD><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<D3BF><DAA3>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<C3B8><C3BA><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart1Check(void)
|
|||
|
{
|
|||
|
if(++ucUart1TimeoutCnt >= 4) //<2F><><EFBFBD><EFBFBD>4*50mSû<53><C3BB>UARTͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λָ<CEBB><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
-<2D>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
|||
|
{
|
|||
|
ucUart1TimeoutCnt = 0;
|
|||
|
ucUart1BufPT = 0;
|
|||
|
Uart1RxEn(); //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
1990
|
|||
|
1991 #if (UART2_DEFINE != 0)
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart2AppRx
|
|||
|
* <20><> <20><>: RxData<74><61>Uart2<74><32><EFBFBD>յ<EFBFBD><D5B5><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>SBUF2<46><32>ȡ
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART2<54><32><EFBFBD><EFBFBD><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<D3BF><DAA3>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<C3B8><C3BA><EFBFBD>
|
|||
|
ucUart2Buf[0]--Slave Addr
|
|||
|
ucUart2Buf[1]--CMD No.
|
|||
|
ucUart2Buf[2]--Offset
|
|||
|
ucUart2Buf[3]--Data Length
|
|||
|
ucUart2Buf[4...]--Data
|
|||
|
*************************************************************************************************/
|
|||
|
void InterruptUart2AppRx(U8 RxData)
|
|||
|
{
|
|||
|
ucUart2Buf[ucUart2BufPT] = RxData;
|
|||
|
ucUart2BufPT++;
|
|||
|
if(ucUart2BufPT >= 140)
|
|||
|
{
|
|||
|
ucUart2BufPT = 0;
|
|||
|
}
|
|||
|
if(ucUart2BufPT == 1)
|
|||
|
{
|
|||
|
McuBank1Sel();
|
|||
|
if((ucUart2Buf[UART_SLAVE_ADDR]&0xFE) == SADDR2) //<2F><><EFBFBD>յĵ<D5B5>һ<EFBFBD><D2BB><EFBFBD>ֽ<EFBFBD><D6BD>Ƿ<EFBFBD><C7B7><EFBFBD>UART<52><54>ַƥ<D6B7><C6A5>
|
|||
|
{
|
|||
|
McuBank0Sel();
|
|||
|
if((ucUart2Buf[UART_SLAVE_ADDR]&0x01)==0) //bit7<74><37>R/W<><57>־<EFBFBD><D6BE>0--R, 1--W
|
|||
|
{
|
|||
|
bUart2ReadFlg = 1;
|
|||
|
bUart2WriteFlg = 0;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
bUart2WriteFlg = 1;
|
|||
|
bUart2ReadFlg = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else if(ucUart2Buf[HEARD1] != 0x5A) //<2F>ж<EFBFBD><D0B6>Ƿ<EFBFBD>ΪIAP/ISP<53><50><EFBFBD><EFBFBD>ʼ֡
|
|||
|
{
|
|||
|
ucUart2BufPT = 0; //<2F><><EFBFBD><EFBFBD>֡ͷ<D6A1><CDB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λָ<CEBB><D6B8>
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 34
|
|||
|
|
|||
|
}
|
|||
|
}
|
|||
|
|
|||
|
if(bUart2ReadFlg)
|
|||
|
{
|
|||
|
if(ucUart2BufPT==3)
|
|||
|
{
|
|||
|
Uart2RdCmdProcess(); //Read the command process
|
|||
|
}
|
|||
|
}
|
|||
|
else if(bUart2WriteFlg)
|
|||
|
{
|
|||
|
if(ucUart2BufPT > (ucUart2Buf[UART_LENGTH]+3)) //If a write operation, and complete all the d
|
|||
|
-ata has been received
|
|||
|
{
|
|||
|
Uart2WrCmdProcess(); //Write the command peocess
|
|||
|
bUart2WriteFlg = 0; //PC write MCU communiaction over
|
|||
|
ucUart2BufPT = 0;
|
|||
|
}
|
|||
|
}
|
|||
|
else //<2F>Ƕ<EFBFBD><C7B6><EFBFBD>д<EFBFBD><D0B4><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ΪISP<53><50><EFBFBD><EFBFBD>IAP<41><50>begin<69><6E><EFBFBD><EFBFBD>
|
|||
|
{
|
|||
|
Uart2IapCheckHandshake();
|
|||
|
}
|
|||
|
bUart2SndAckFlg = 0;
|
|||
|
|
|||
|
ucSleepTimerCnt = 0; //UART<52><54><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CDB9>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>UART<52><54>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
|||
|
ucPDTimerCnt = 0;
|
|||
|
ucUart2TimeoutCnt = 0;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUartAppTx
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART<52><54><EFBFBD><EFBFBD><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<D3BF><DAA3>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<C3B8><C3BA><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void InterruptUart2AppTx(void)
|
|||
|
{
|
|||
|
if((ucUart2Buf[HEARD1] == 0x5A) && (ucUart2Buf[HEARD2] == 0xA5) || bISPFlg)
|
|||
|
{
|
|||
|
if(ucUart2BufPT >= (ucUart2Buf[LENGTH]+8))
|
|||
|
{
|
|||
|
Uart2RxEn(); //Allow UART receive data
|
|||
|
ucUart2BufPT = 0;
|
|||
|
bUart2ReadFlg = 0; //PC read MCU communication over
|
|||
|
ucUart2Buf[0] = 0;
|
|||
|
ucUart2Buf[1] = 0;
|
|||
|
ucUart2Buf[2] = 0;
|
|||
|
ucUart2Buf[3] = 0;
|
|||
|
bUart2SndAckFlg = 1;
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart2BufPT++;
|
|||
|
Uart2TxEn(ucUart2Buf[ucUart2BufPT]); //20220620
|
|||
|
}
|
|||
|
}
|
|||
|
else if((ucUart2BufPT==0) || (ucUart2BufPT>=ucUart2Buf[UART_LENGTH]+3))
|
|||
|
{
|
|||
|
Uart2RxEn(); //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
C51 COMPILER V9.01 UARTAPP 02/06/2025 15:28:45 PAGE 35
|
|||
|
|
|||
|
ucUart2BufPT = 0;
|
|||
|
bUart2ReadFlg = 0;
|
|||
|
ucUart2Buf[0] = 0;
|
|||
|
ucUart2Buf[1] = 0;
|
|||
|
ucUart2Buf[2] = 0;
|
|||
|
ucUart2Buf[3] = 0;
|
|||
|
bUart2SndAckFlg = 1; //UART<52>ѷ<EFBFBD><D1B7><EFBFBD><CDB9><EFBFBD><EFBFBD>ݣ<EFBFBD><DDA3><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD>ȴ<EFBFBD><C8B4><EFBFBD><EFBFBD><EFBFBD>A
|
|||
|
-CK<43><4B><EFBFBD>ܽ<EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ĺ<EFBFBD><C4B9><EFBFBD>
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
ucUart2BufPT++;
|
|||
|
Uart2TxEn(ucUart2Buf[ucUart2BufPT]);
|
|||
|
}
|
|||
|
|
|||
|
ucSleepTimerCnt = 0; //UART<52><54><EFBFBD><EFBFBD>ͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><CDB9>ļ<EFBFBD><C4BC><EFBFBD><EFBFBD><EFBFBD>UART<52><54>λ<EFBFBD><CEBB><EFBFBD><EFBFBD>
|
|||
|
ucPDTimerCnt = 0;
|
|||
|
ucUart2TimeoutCnt = 0;
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/*************************************************************************************************
|
|||
|
* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>: InterruptUart0AppTx
|
|||
|
* <20><> <20><>: <20><>
|
|||
|
* <20><><EFBFBD><EFBFBD>ֵ: <20><>
|
|||
|
* <20><> <20><>: UART<52><54><EFBFBD><EFBFBD><EFBFBD>жϷ<D0B6><CFB7><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ӿڣ<D3BF><DAA3>жϴ<D0B6><CFB4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>øú<C3B8><C3BA><EFBFBD>
|
|||
|
*************************************************************************************************/
|
|||
|
void Uart2Check(void)
|
|||
|
{
|
|||
|
if(++ucUart2TimeoutCnt >= 4) //<2F><><EFBFBD><EFBFBD>4*50mSû<53><C3BB>UARTͨѶ<CDA8><D1B6><EFBFBD><EFBFBD><EFBFBD><EFBFBD>λָ<CEBB><D6B8><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
-<2D>л<EFBFBD><D0BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ģʽ
|
|||
|
{
|
|||
|
ucUart2TimeoutCnt = 0;
|
|||
|
ucUart2BufPT = 0;
|
|||
|
Uart2RxEn(); //UART<52><54><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
}
|
|||
|
}
|
|||
|
#endif
|
|||
|
|
|||
|
|
|||
|
MODULE INFORMATION: STATIC OVERLAYABLE
|
|||
|
CODE SIZE = 2112 ----
|
|||
|
CONSTANT SIZE = 72 ----
|
|||
|
XDATA SIZE = 13 8
|
|||
|
PDATA SIZE = ---- ----
|
|||
|
DATA SIZE = ---- ----
|
|||
|
IDATA SIZE = ---- ----
|
|||
|
BIT SIZE = 10 ----
|
|||
|
END OF MODULE INFORMATION.
|
|||
|
|
|||
|
|
|||
|
C51 COMPILATION COMPLETE. 0 WARNING(S), 0 ERROR(S)
|