From 303494d1e4be26e5aa49a988f83700deb1a36644 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E8=B5=B7=E5=BA=8A=E5=B0=B1=E7=8A=AF=E5=9B=B0?=
<11730503+psx123456@user.noreply.gitee.com>
Date: Wed, 26 Feb 2025 17:59:15 +0800
Subject: [PATCH] =?UTF-8?q?=E6=B7=BB=E5=8A=A0adc=EF=BC=8C=E4=B8=B2?=
=?UTF-8?q?=E5=8F=A3=EF=BC=8Cgpio=EF=BC=8Cflash=E7=AD=89=E5=A4=96=E8=AE=BE?=
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
---
.gitignore | 7 +
CH32V303-FreeRTOS/.cproject | 7 +
CH32V303-FreeRTOS/.mrs/launch.json | 65 +
CH32V303-FreeRTOS/.mrs/preferredEncoding.json | 8 +
.../App/application/Inc/freerotsTask.h | 11 +
.../App/application/Src/freerotsTask.c | 53 +
.../App/functionalModule/Inc/FM_ADC.h | 13 +
.../App/functionalModule/Inc/FM_GPIO.h | 32 +
.../App/functionalModule/Inc/flash.h | 16 +
.../App/functionalModule/Inc/uart_dev.h | 66 +
.../App/functionalModule/Src/FM_ADC.c | 94 +
.../App/functionalModule/Src/FM_GPIO.c | 108 +
.../App/functionalModule/Src/flash.c | 42 +
.../App/functionalModule/Src/uart_dev.c | 646 +
.../App/hardwareDriver/Inc/HD_ADC.h | 19 +
.../App/hardwareDriver/Inc/HD_Flash.h | 98 +
.../App/hardwareDriver/Inc/HD_GPIO.h | 54 +
.../App/hardwareDriver/Inc/HD_UART.h | 103 +
.../App/hardwareDriver/Src/HD_ADC.c | 100 +
.../App/hardwareDriver/Src/HD_Flash.c | 456 +
.../App/hardwareDriver/Src/HD_GPIO.c | 95 +
.../App/hardwareDriver/Src/HD_UART.c | 562 +
CH32V303-FreeRTOS/App/tools/comm_types.h | 10 +-
CH32V303-FreeRTOS/App/tools/pDebug.h | 10 +-
CH32V303-FreeRTOS/CH32V303-FreeRTOS.wvproj | 15 +-
CH32V303-FreeRTOS/Ld/Link.ld | 187 +-
.../Startup/startup_ch32v30x_D8.S | 1 +
CH32V303-FreeRTOS/User/main.c | 5 +-
.../obj/App/tools/RingQueue/subdir.mk | 2 +-
CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.elf | Bin 176664 -> 365948 bytes
CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.hex | 1838 ++-
CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.lst | 11013 +++++++++++-----
CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.map | 1936 ++-
CH32V303-FreeRTOS/obj/Core/subdir.mk | 2 +-
CH32V303-FreeRTOS/obj/Debug/subdir.mk | 2 +-
.../FreeRTOS/portable/GCC/RISC-V/subdir.mk | 4 +-
.../obj/FreeRTOS/portable/MemMang/subdir.mk | 2 +-
CH32V303-FreeRTOS/obj/FreeRTOS/subdir.mk | 2 +-
.../obj/Peripheral/src/subdir.mk | 2 +-
CH32V303-FreeRTOS/obj/Startup/subdir.mk | 2 +-
CH32V303-FreeRTOS/obj/User/main.d | 8 +-
CH32V303-FreeRTOS/obj/User/main.o | Bin 14920 -> 15224 bytes
CH32V303-FreeRTOS/obj/User/subdir.mk | 2 +-
CH32V303-FreeRTOS/obj/makefile | 3 +
CH32V303-FreeRTOS/obj/sources.mk | 3 +
README.md | 42 +
46 files changed, 13434 insertions(+), 4312 deletions(-)
create mode 100644 .gitignore
create mode 100644 CH32V303-FreeRTOS/.mrs/launch.json
create mode 100644 CH32V303-FreeRTOS/.mrs/preferredEncoding.json
create mode 100644 CH32V303-FreeRTOS/App/application/Inc/freerotsTask.h
create mode 100644 CH32V303-FreeRTOS/App/application/Src/freerotsTask.c
create mode 100644 CH32V303-FreeRTOS/App/functionalModule/Inc/FM_ADC.h
create mode 100644 CH32V303-FreeRTOS/App/functionalModule/Inc/FM_GPIO.h
create mode 100644 CH32V303-FreeRTOS/App/functionalModule/Inc/flash.h
create mode 100644 CH32V303-FreeRTOS/App/functionalModule/Inc/uart_dev.h
create mode 100644 CH32V303-FreeRTOS/App/functionalModule/Src/FM_ADC.c
create mode 100644 CH32V303-FreeRTOS/App/functionalModule/Src/FM_GPIO.c
create mode 100644 CH32V303-FreeRTOS/App/functionalModule/Src/flash.c
create mode 100644 CH32V303-FreeRTOS/App/functionalModule/Src/uart_dev.c
create mode 100644 CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_ADC.h
create mode 100644 CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_Flash.h
create mode 100644 CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_GPIO.h
create mode 100644 CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_UART.h
create mode 100644 CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_ADC.c
create mode 100644 CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_Flash.c
create mode 100644 CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_GPIO.c
create mode 100644 CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_UART.c
create mode 100644 README.md
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..e68c7dd
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,7 @@
+#
+
+obj/
+
+*.o
+*.elf
+*.hex
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/.cproject b/CH32V303-FreeRTOS/.cproject
index e496c79..3f7b7cc 100644
--- a/CH32V303-FreeRTOS/.cproject
+++ b/CH32V303-FreeRTOS/.cproject
@@ -109,6 +109,8 @@
+
+
@@ -136,6 +138,11 @@
+
+
+
+
+
diff --git a/CH32V303-FreeRTOS/.mrs/launch.json b/CH32V303-FreeRTOS/.mrs/launch.json
new file mode 100644
index 0000000..247b8ac
--- /dev/null
+++ b/CH32V303-FreeRTOS/.mrs/launch.json
@@ -0,0 +1,65 @@
+{
+ "version": "0.2.0",
+ "configurations": [
+ {
+ "type": "mrs-debugger",
+ "request": "launch",
+ "name": "CH32V303-FreeRTOS",
+ "cwd": "d:\\psx\\su806\\2.software\\mcu_git\\CH32V303-FreeRTOS",
+ "openOCDCfg": {
+ "useLocalOpenOCD": true,
+ "executable": "c:/MounRiver/MounRiver_Studio2/resources/app/resources/win32/components/WCH/OpenOCD/OpenOCD/bin/openocd.exe",
+ "configOptions": [
+ "-f \"c:/MounRiver/MounRiver_Studio2/resources/app/resources/win32/components/WCH/OpenOCD/OpenOCD/bin/wch-riscv.cfg\" -c \"chip_id CH32V30x\""
+ ],
+ "gdbport": 3333,
+ "telnetport": 4444,
+ "tclport": 6666,
+ "host": "localhost",
+ "port": 3333,
+ "skipDownloadBeforeDebug": false,
+ "enablePageEraser": false,
+ "enableNoZeroWaitingAreaFlash": false
+ },
+ "gdbCfg": {
+ "executable": "c:/MounRiver/MounRiver_Studio2/resources/app/resources/win32/components/WCH/Toolchain/RISC-V Embedded GCC/bin/riscv-none-embed-gdb.exe",
+ "commands": [
+ "set mem inaccessible-by-default off",
+ "set architecture riscv:rv32",
+ "set remotetimeout unlimited",
+ "set disassembler-options xw"
+ ],
+ "options": []
+ },
+ "startup": {
+ "initCommands": {
+ "initReset": true,
+ "initResetType": "init",
+ "armSemihosting": false,
+ "additionalCommands": []
+ },
+ "loadedFiles": {
+ "executableFile": "d:\\psx\\su806\\2.software\\mcu_git\\CH32V303-FreeRTOS\\obj\\CH32V303-FreeRTOS.elf",
+ "symbolFile": "d:\\psx\\su806\\2.software\\mcu_git\\CH32V303-FreeRTOS\\obj\\CH32V303-FreeRTOS.elf",
+ "executableFileOffset": 0,
+ "symbolFileOffset": 0
+ },
+ "runCommands": {
+ "runReset": true,
+ "runResetType": "halt",
+ "additionalCommands": [],
+ "setBreakAt": "handle_reset",
+ "continue": true,
+ "setProgramCounterAt": 0
+ },
+ "debugInRAM": false
+ },
+ "svdpath": "c:\\MounRiver\\MounRiver_Studio2\\resources\\app\\resources\\win32\\components\\WCH\\SDK\\default/RISC-V/CH32V307/NoneOS/CH32V307xx.svd",
+ "output": {
+ "showDebugGDBTrace": true,
+ "saveDebugOutputToFile": false,
+ "showDebugOutputTimestamps": true
+ }
+ }
+ ]
+}
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/.mrs/preferredEncoding.json b/CH32V303-FreeRTOS/.mrs/preferredEncoding.json
new file mode 100644
index 0000000..8d898b2
--- /dev/null
+++ b/CH32V303-FreeRTOS/.mrs/preferredEncoding.json
@@ -0,0 +1,8 @@
+{
+ "details": [
+ {
+ "file": "App/hardwareDriver/Inc/HD_GPIO.h",
+ "encoding": "gbk"
+ }
+ ]
+}
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/App/application/Inc/freerotsTask.h b/CH32V303-FreeRTOS/App/application/Inc/freerotsTask.h
new file mode 100644
index 0000000..1c41881
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/application/Inc/freerotsTask.h
@@ -0,0 +1,11 @@
+#ifndef APP_FREERTOS_TASK_H_
+#define APP_FREERTOS_TASK_H_
+
+#include "pDebug.h"
+#include "FreeRTOS.h"
+#include "task.h"
+
+void startApp(void);
+
+
+#endif
diff --git a/CH32V303-FreeRTOS/App/application/Src/freerotsTask.c b/CH32V303-FreeRTOS/App/application/Src/freerotsTask.c
new file mode 100644
index 0000000..f3220d8
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/application/Src/freerotsTask.c
@@ -0,0 +1,53 @@
+
+#include "freerotsTask.h"
+
+
+#include "uart_dev.h"
+#include "HD_UART.h"
+#include "FM_GPIO.h"
+#include "FM_ADC.h"
+
+#define TASK1_TASK_PRIO 5
+#define TASK1_STK_SIZE 256
+
+TaskHandle_t Task1Task_Handler;
+uint8_t data[20] = "hello world\n";
+
+void task1_task(void *pvParameters)
+{
+ writePwrCtrlState(Android_PwrCtrl, PwrCtrlOpen);
+ proportionalInt();
+ while(1) {
+ // printf("task1 entry\r\n");
+ printf_adc_data();
+ USART_ITConfig(UART5, USART_IT_TXE, ENABLE);
+ uartInterruptSend(g_Upward_uart5_handle, data, 12);
+ vTaskDelay(1000);
+ }
+}
+
+
+/**
+ * @brief
+ * @param
+ * @retval
+ */
+void startApp(void)
+{
+ Init_Upward_uart(115200);
+ FM_GPIO_Init();
+ FM_ADC_Init();
+
+ /* create task */
+ xTaskCreate((TaskFunction_t )task1_task,
+ (const char* )"task1",
+ (uint16_t )TASK1_STK_SIZE,
+ (void* )NULL,
+ (UBaseType_t )TASK1_TASK_PRIO,
+ (TaskHandle_t* )&Task1Task_Handler);
+ vTaskStartScheduler();
+}
+
+
+
+
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Inc/FM_ADC.h b/CH32V303-FreeRTOS/App/functionalModule/Inc/FM_ADC.h
new file mode 100644
index 0000000..0db2bdb
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Inc/FM_ADC.h
@@ -0,0 +1,13 @@
+#ifndef FM_ADC_H_
+#define FM_ADC_H_
+
+#include "HD_ADC.h"
+
+void FM_ADC_Init(void);
+void printf_adc_data(void);
+void proportionalInt(void);
+float getSOCPwrOnVoltage(void);
+float getInCurrent(void);
+float getInVoltage(void);
+
+#endif
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Inc/FM_GPIO.h b/CH32V303-FreeRTOS/App/functionalModule/Inc/FM_GPIO.h
new file mode 100644
index 0000000..95fe421
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Inc/FM_GPIO.h
@@ -0,0 +1,32 @@
+#ifndef FM_GPIO_H_
+#define FM_GPIO_H_
+
+#include "HD_GPIO.h"
+#include "stdio.h"
+
+typedef enum _pwrCtrl{
+ J1_PwrCtrl = 1,
+ J2_PwrCtrl,
+ J3_PwrCtrl,
+ J4_PwrCtrl,
+ J5_PwrCtrl,
+ J6_PwrCtrl,
+ J7_PwrCtrl,
+ J8_PwrCtrl,
+ J9_PwrCtrl,
+ Android_PwrCtrl,
+}pwrCtrl;
+
+typedef enum _pwrCtrlState{
+ PwrCtrlClose = 0,
+ PwrCtrlOpen
+}pwrCtrlState;
+
+void FM_GPIO_Init(void);
+void feedDog(void);
+void writePwrCtrlState(uint8_t type, uint8_t State);
+uint8_t readPwrCtrlState(uint8_t type);
+void startResetAndroidModule(void);
+void stopResetAndroidModule(void);
+
+#endif
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Inc/flash.h b/CH32V303-FreeRTOS/App/functionalModule/Inc/flash.h
new file mode 100644
index 0000000..5ee758f
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Inc/flash.h
@@ -0,0 +1,16 @@
+
+#ifndef FM_FLASH_H_
+#define FM_FLASH_H_
+
+#include "ch32v30x.h"
+#include "HD_Flash.h"
+// #include "w25q256.h"
+
+void Flash_Init(void);
+void read_Flash(uint8_t* pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead);
+void write_Flash(uint8_t* pBuffer,uint32_t WriteAddr,uint16_t NumByteToWrite);
+void erase_Sector_Flash(uint32_t secpos);
+
+
+
+#endif
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Inc/uart_dev.h b/CH32V303-FreeRTOS/App/functionalModule/Inc/uart_dev.h
new file mode 100644
index 0000000..8e810e1
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Inc/uart_dev.h
@@ -0,0 +1,66 @@
+#ifndef FM_UART_DEV_H_
+#define FM_UART_DEV_H_
+
+#include "ch32v30x.h"
+#include "HD_UART.h"
+#include "comm_types.h"
+#include "ring_queue.h"
+
+/* 是否使用中断发送，后期可能改为DMA发送 */
+#define UARTINTERRUPTSEND
+
+#define ASCII_CHAR_BACKSPACE 0x08 /* '\b' */
+#define ASCII_CHAR_CHARACTER_TABULATION 0x09 /* '\t' */
+#define ASCII_CHAR_LINE_FEED 0x0A /* '\n' */
+#define ASCII_CHAR_LINE_TABULATION 0x0B /* '\v' */
+#define ASCII_CHAR_FORM_FEED 0x0C /* '\f' */
+#define ASCII_CHAR_CARRIAGE_RETURN 0x0D /* '\r' */
+
+typedef enum{
+ J1_485_INDEX = 6,
+ J2_485_INDEX = 7,
+ J3_485_INDEX = 2,
+ J4_485_INDEX = 8,
+ J5_0_485_INDEX = 3,
+ Upward_UART_INDEX = 5,
+}uartIndex_e;
+
+typedef struct _uartSendInfo {
+ uint8_t *data; //指向数据
+#ifdef UARTINTERRUPTSEND
+ uint16_t count; //已经发送数据字节个数
+ uint16_t len; //数据长度
+#endif
+}uartSendInfo;
+
+/* UART 驱动数据结构，对应一个uart设备 */
+typedef struct _uart_device_info{
+ uint8_t init;
+ uartIndex_e uart_index;
+ uint32_t uart_baudrate;
+ RingQueue uart_ring_queue;
+ uartSendInfo uart_send_data;
+}uart_device_info;
+
+typedef uint32_t device_handle;
+extern device_handle g_J1_uart6_handle;
+extern device_handle g_J2_uart7_handle;
+extern device_handle g_J3_usart2_handle;
+extern device_handle g_J4_uart8_handle;
+extern device_handle g_J5_0_usart3_handle;
+extern device_handle g_Upward_uart5_handle;
+
+uint8_t uart_dev_in_char(device_handle device);
+int uart_dev_char_present(device_handle device);
+void Init_J1_485(uint32_t baud);
+void Init_J2_485(uint32_t baud);
+void Init_J3_485(uint32_t baud);
+void Init_J4_485(uint32_t baud);
+void Init_J5_0_485(uint32_t baud);
+void Init_Upward_uart(uint32_t baud);
+
+#ifdef UARTINTERRUPTSEND
+uint8_t uartInterruptSend(device_handle device, uint8_t *data, uint16_t len);
+#endif
+
+#endif
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Src/FM_ADC.c b/CH32V303-FreeRTOS/App/functionalModule/Src/FM_ADC.c
new file mode 100644
index 0000000..51d7ae8
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Src/FM_ADC.c
@@ -0,0 +1,94 @@
+
+#include "FM_ADC.h"
+
+/* adcɼתı */
+/* ϵͳѹ */
+static float P_PwrOn_Voltage;
+/* صĵѹ */
+static float P_In_Voltage;
+/* صĵ */
+static float P_In_Current;
+
+/* οѹĴС */
+#define referenceVoltage 3.3f
+
+/**
+ * @brief ɼadcУ
+ * @param val ɼadc
+ * @retval Уadc
+ */
+static uint16_t Get_ConversionVal(int16_t val)
+{
+ if((val + Calibrattion_Val) < 0 || val == 0)
+ return 0;
+ if((Calibrattion_Val + val) > 4095 || val == 4095)
+ return 4095;
+ return (val + Calibrattion_Val);
+}
+
+/**
+ * @brief ʼadc
+ * @param
+ * @retval
+ */
+void FM_ADC_Init(void)
+{
+ HD_ADC_InIt();
+ ADC_DMA_Init();
+ startAdcCapture();
+}
+
+/**
+ * @brief ӡadcɵ
+ * @param
+ * @retval
+ */
+void printf_adc_data(void)
+{
+ printf("adc : %d, %d, %d\n", adcData[0], adcData[1], adcData[2]);
+ printf("getSOCPwrOnVoltage: %d\n", (int)(getSOCPwrOnVoltage() * 1000.0f));
+ printf("getInCurrent: %d\n", (int)(getInCurrent() * 1000.0f));
+ printf("getInVoltage: %d\n", (int)(getInVoltage() * 1000.0f));
+}
+
+/**
+ * @brief ʼתı
+ * @param
+ * @retval
+ */
+void proportionalInt(void)
+{
+ P_PwrOn_Voltage = referenceVoltage / 4095.0f;
+ P_In_Voltage = ((100.0f + 10.0f) / 10.0f) * referenceVoltage / 4095.0f;
+ P_In_Current = ((1.0f / 50.0f) / (0.01f)) * referenceVoltage / 4095.0f;
+}
+
+/**
+ * @brief õsocѹ
+ * @param
+ * @retval
+ */
+float getSOCPwrOnVoltage(void)
+{
+ return (Get_ConversionVal(adcData[0]) * P_PwrOn_Voltage);
+}
+
+/**
+ * @brief õغӵĵ
+ * @param
+ * @retval
+ */
+float getInCurrent(void)
+{
+ return (Get_ConversionVal(adcData[1]) * P_In_Current);
+}
+
+/**
+ * @brief õغӵĵѹ
+ * @param
+ * @retval
+ */
+float getInVoltage(void)
+{
+ return (Get_ConversionVal(adcData[2]) * P_In_Voltage);
+}
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Src/FM_GPIO.c b/CH32V303-FreeRTOS/App/functionalModule/Src/FM_GPIO.c
new file mode 100644
index 0000000..6bca8de
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Src/FM_GPIO.c
@@ -0,0 +1,108 @@
+#include "FM_GPIO.h"
+
+
+/**
+ * @brief ʼGPIO
+ * @param
+ * @retval
+ */
+void FM_GPIO_Init(void)
+{
+ HD_GPIO_Init();
+}
+
+/**
+ * @brief ι
+ * @param
+ * @retval
+ */
+void feedDog(void)
+{
+ HD_GPIO_Write(WDI_GPIO_PROT, WDI_GPIO_PIN, GPIO_RESET);
+ HD_GPIO_Write(WDI_GPIO_PROT, WDI_GPIO_PIN, GPIO_SET);
+}
+
+/**
+ * @brief Դ״̬
+ * @param type Դӿ
+ state ״̬
+ * @retval
+ */
+void writePwrCtrlState(uint8_t type, uint8_t State)
+{
+ if (type == J1_PwrCtrl) {
+ HD_GPIO_Write(J1_PwrCtrl_GPIO_PROT, J1_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J2_PwrCtrl) {
+ HD_GPIO_Write(J2_PwrCtrl_GPIO_PROT, J2_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J3_PwrCtrl) {
+ HD_GPIO_Write(J3_PwrCtrl_GPIO_PROT, J3_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J4_PwrCtrl) {
+ HD_GPIO_Write(J4_PwrCtrl_GPIO_PROT, J4_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J5_PwrCtrl) {
+ HD_GPIO_Write(J5_PwrCtrl_GPIO_PROT, J5_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J6_PwrCtrl) {
+ HD_GPIO_Write(J6_PwrCtrl_GPIO_PROT, J6_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J7_PwrCtrl) {
+ HD_GPIO_Write(J7_PwrCtrl_GPIO_PROT, J7_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J8_PwrCtrl) {
+ HD_GPIO_Write(J8_PwrCtrl_GPIO_PROT, J8_PwrCtrl_GPIO_PIN, State);
+ } else if (type == J9_PwrCtrl) {
+ HD_GPIO_Write(J9_PwrCtrl_GPIO_PROT, J9_PwrCtrl_GPIO_PIN, State);
+ } else if (type == Android_PwrCtrl) {
+ HD_GPIO_Write(GPIO_PwrCtrl_GPIO_PROT, GPIO_PwrCtrl_GPIO_PIN, State);
+ }
+}
+
+/**
+ * @brief ȡԴ״̬
+ * @param type Դӿ
+ * @retval state ״̬
+ 0xFF ʹ
+ PwrCtrlClose ر״̬
+ PwrCtrlOpen ״̬
+ */
+uint8_t readPwrCtrlState(uint8_t type)
+{
+ if (type == J1_PwrCtrl) {
+ return HD_OutputGPIO_Read(J1_PwrCtrl_GPIO_PROT, J1_PwrCtrl_GPIO_PIN);
+ } else if (type == J2_PwrCtrl) {
+ return HD_OutputGPIO_Read(J2_PwrCtrl_GPIO_PROT, J2_PwrCtrl_GPIO_PIN);
+ } else if (type == J3_PwrCtrl) {
+ return HD_OutputGPIO_Read(J3_PwrCtrl_GPIO_PROT, J3_PwrCtrl_GPIO_PIN);
+ } else if (type == J4_PwrCtrl) {
+ return HD_OutputGPIO_Read(J4_PwrCtrl_GPIO_PROT, J4_PwrCtrl_GPIO_PIN);
+ } else if (type == J5_PwrCtrl) {
+ return HD_OutputGPIO_Read(J5_PwrCtrl_GPIO_PROT, J5_PwrCtrl_GPIO_PIN);
+ } else if (type == J6_PwrCtrl) {
+ return HD_OutputGPIO_Read(J6_PwrCtrl_GPIO_PROT, J6_PwrCtrl_GPIO_PIN);
+ } else if (type == J7_PwrCtrl) {
+ return HD_OutputGPIO_Read(J7_PwrCtrl_GPIO_PROT, J7_PwrCtrl_GPIO_PIN);
+ } else if (type == J8_PwrCtrl) {
+ return HD_OutputGPIO_Read(J8_PwrCtrl_GPIO_PROT, J8_PwrCtrl_GPIO_PIN);
+ } else if (type == J9_PwrCtrl) {
+ return HD_OutputGPIO_Read(J9_PwrCtrl_GPIO_PROT, J9_PwrCtrl_GPIO_PIN);
+ } else if (type == Android_PwrCtrl) {
+ return HD_OutputGPIO_Read(GPIO_PwrCtrl_GPIO_PROT, GPIO_PwrCtrl_GPIO_PIN);
+ }
+ return 0xFF;
+}
+
+/**
+ * @brief ʼλģ飬7-10SģḴλ
+ * @param
+ * @retval
+ */
+void startResetAndroidModule(void)
+{
+ HD_GPIO_Write(GPIO_PwrKey_GPIO_PROT, GPIO_PwrKey_GPIO_PIN, GPIO_SET);
+}
+
+/**
+ * @brief ֹͣλģ飬ʹÿʼλģ麯7-10Sģ鸴λʹøú
+ * @param
+ * @retval
+ */
+void stopResetAndroidModule(void)
+{
+ HD_GPIO_Write(GPIO_PwrKey_GPIO_PROT, GPIO_PwrKey_GPIO_PIN, GPIO_RESET);
+}
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Src/flash.c b/CH32V303-FreeRTOS/App/functionalModule/Src/flash.c
new file mode 100644
index 0000000..9b54d38
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Src/flash.c
@@ -0,0 +1,42 @@
+#include "flash.h"
+
+/**
+ * @brief flash初始化
+ * @param
+ */
+void Flash_Init(void)
+{
+ SPI_Flash_Init();
+}
+
+/**
+ * @brief 读取flash中的数据
+ * @param pBuffer 保存读取的数据
+ * @param ReadAddr 读取数据的位置
+ * @param NumByteToRead 读取数据的长度
+ */
+void read_Flash(uint8_t* pBuffer,uint32_t ReadAddr,uint16_t NumByteToRead)
+{
+ SPI_Flash_Read(pBuffer, ReadAddr, NumByteToRead);
+}
+
+/**
+ * @brief 将数据写入到flash中
+ * @param pBuffer 要写入的数据
+ * @param ReadAddr 要写入数据的位置
+ * @param NumByteToRead 要写入数据的长度
+ */
+void write_Flash(uint8_t* pBuffer,uint32_t WriteAddr,uint16_t NumByteToWrite)
+{
+ SPI_Flash_Write(pBuffer, WriteAddr, NumByteToWrite);
+}
+
+
+/**
+ * @brief 清除flash中secpos扇区的数据
+ *
+ */
+void erase_Sector_Flash(uint32_t secpos)
+{
+ SPI_Flash_Erase_Sector(secpos);
+}
diff --git a/CH32V303-FreeRTOS/App/functionalModule/Src/uart_dev.c b/CH32V303-FreeRTOS/App/functionalModule/Src/uart_dev.c
new file mode 100644
index 0000000..3e7124b
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/functionalModule/Src/uart_dev.c
@@ -0,0 +1,646 @@
+#include "uart_dev.h"
+#include
+#include
+#include
+#include "pDebug.h"
+
+device_handle g_J1_uart6_handle;
+device_handle g_J2_uart7_handle;
+device_handle g_J3_usart2_handle;
+device_handle g_J4_uart8_handle;
+device_handle g_J5_0_usart3_handle;
+device_handle g_Upward_uart5_handle;
+
+/* 接收缓冲区数组 */
+uint8_t J1_Rbuffer[1] = {0x00};
+uint8_t J2_Rbuffer[1] = {0x00};
+uint8_t J3_Rbuffer[1] = {0x00};
+uint8_t J4_Rbuffer[1] = {0x00};
+uint8_t J5_0_Rbuffer[1] = {0x00};
+uint8_t Upward_Rbuffer[1] = {0x00};
+
+/* 环形buff */
+#define J485BuffLen 256
+uint8_t J1_inBuff[J485BuffLen];
+uint8_t J2_inBuff[J485BuffLen];
+uint8_t J3_inBuff[J485BuffLen];
+uint8_t J4_inBuff[J485BuffLen];
+uint8_t J5_0_inBuff[J485BuffLen];
+#define UpwardBuffLen 1024
+uint8_t Upward_inBuff[UpwardBuffLen];
+
+/* 用于当做发送时的标志位 8个位，分别对应各个串口 */
+#define J1_485_Send 0x01
+#define J2_485_Send 0x02
+#define J3_485_Send 0x04
+#define J4_485_Send 0x08
+#define J5_0_485_Send 0x20
+#define Upward_uart_Send 0x40
+static uint8_t uartInterruptSendFlag = 0;
+
+// static uint8_t getJ1_485_SendState(void);
+static void setJ1_485_SendState(uint8_t state);
+// static uint8_t getJ2_485_SendState(void);
+static void setJ2_485_SendState(uint8_t state);
+// static uint8_t getJ3_485_SendState(void);
+static void setJ3_485_SendState(uint8_t state);
+// static uint8_t getJ4_485_SendState(void);
+static void setJ4_485_SendState(uint8_t state);
+// static uint8_t getJ5_0_485_SendState(void);
+static void setJ5_0_485_SendState(uint8_t state);
+// static uint8_t getUpward_uart_SendState(void);
+static void setUpward_uart_SendState(uint8_t state);
+
+
+/**
+ * @brief 串口信息初始化，串口号及波特率.
+ * @param uart_index 对应的硬件串口号
+ * @param uart_baudrate 波特率
+ */
+uart_device_info uart_devices[]={
+ [0] = {
+ .init = 0,
+ .uart_index = J1_485_INDEX,
+ .uart_baudrate = 9600,
+ },
+ [1] = {
+ .init = 0,
+ .uart_index = J2_485_INDEX,
+ .uart_baudrate = 9600,
+ },
+ [2] = {
+ .init = 0,
+ .uart_index = J3_485_INDEX,
+ .uart_baudrate = 9600,
+ },
+ [3] = {
+ .init = 0,
+ .uart_index = J4_485_INDEX,
+ .uart_baudrate = 9600,
+ },
+ [4] = {
+ .init = 0,
+ .uart_index = J5_0_485_INDEX,
+ .uart_baudrate = 9600,
+ },
+ [5] = {
+ .init = 0,
+ .uart_index = Upward_UART_INDEX,
+ .uart_baudrate = 115200,
+ },
+};
+
+static device_handle uart_dev_init(uartIndex_e uart_index, uint8_t *buff, int buff_size);
+static void uart_init(uartIndex_e uart_index, uint32_t baud);
+
+
+/**
+ * @brief 初始化串口设备.
+ * @param uart_index 初始化串口号
+ * @param buff 串口循环buff地址
+ * @param buff_size 串口循环buff对应大小
+ * @retval 串口句柄
+ */
+device_handle uart_dev_init(uartIndex_e uart_index, uint8_t *buff, int buff_size)
+{
+ int i = 0;
+ for (; i < ELEMENT_OF(uart_devices); i++) {
+ if (uart_devices[i].uart_index == uart_index) {
+ if (!uart_devices[i].init) {
+ InitRingQueue(&uart_devices[i].uart_ring_queue, buff, buff_size);
+ uart_init(uart_index, uart_devices[i].uart_baudrate);
+
+ uart_devices[i].init = 1;
+ }
+ return (device_handle)(&uart_devices[i]);
+ }
+ }
+ return 0;
+}
+
+/**
+ * @brief 串口硬件初始化.
+ * @param uart_index 串口号
+ * @param baud 波特率
+ * @retval None
+ */
+void uart_init(uartIndex_e uart_index, uint32_t baud)
+{
+ if (uart_index == J1_485_INDEX) {
+ J1_485_Init(baud);
+ } else if (uart_index == J2_485_INDEX) {
+ J2_485_Init(baud);
+ } else if (uart_index == J3_485_INDEX) {
+ J3_485_Init(baud);
+ } else if (uart_index == J4_485_INDEX) {
+ J4_485_Init(baud);
+ } else if (uart_index == J5_0_485_INDEX) {
+ J5_0_485_Init(baud);
+ } else if (uart_index == Upward_UART_INDEX) {
+ Upward_UART5_Init(baud);
+ }
+}
+
+/**
+ * @brief 从串口设备循环buff读取一个数据.
+ * @param device 串口句柄
+ * @retval 读取到的字符
+ */
+uint8_t uart_dev_in_char(device_handle device)
+{
+ uart_device_info *device_info = (uart_device_info *)device;
+ char c = 0;
+
+ if (uart_dev_char_present(device))
+ OutRingQueue(&device_info->uart_ring_queue, (u_int8_t*)&c);
+ return c;
+}
+
+/**
+ * @brief 判断串口设备循环buff是否有数据.
+ * @param device 串口句柄
+ * @retval 0 空 1有数据
+ */
+int uart_dev_char_present(device_handle device)
+{
+ uart_device_info *device_info = (uart_device_info *)device;
+
+ if((!device) || (!device_info->init))
+ return 0;
+
+ return !RingQueueEmpty(&device_info->uart_ring_queue);
+}
+
+/* 初始化 */
+void Init_J1_485(uint32_t baud)
+{
+ uart_devices[0].uart_baudrate = baud;
+ g_J1_uart6_handle = uart_dev_init(J1_485_INDEX, J1_inBuff, J485BuffLen);
+}
+
+void Init_J2_485(uint32_t baud)
+{
+ uart_devices[1].uart_baudrate = baud;
+ g_J2_uart7_handle = uart_dev_init(J2_485_INDEX, J2_inBuff, J485BuffLen);
+}
+
+void Init_J3_485(uint32_t baud)
+{
+ uart_devices[2].uart_baudrate = baud;
+ g_J3_usart2_handle = uart_dev_init(J3_485_INDEX, J3_inBuff, J485BuffLen);
+}
+
+void Init_J4_485(uint32_t baud)
+{
+ uart_devices[3].uart_baudrate = baud;
+ g_J4_uart8_handle = uart_dev_init(J4_485_INDEX, J4_inBuff, J485BuffLen);
+}
+
+void Init_J5_0_485(uint32_t baud)
+{
+ uart_devices[4].uart_baudrate = baud;
+ g_J5_0_usart3_handle = uart_dev_init(J5_0_485_INDEX, J5_0_inBuff, J485BuffLen);
+}
+
+void Init_Upward_uart(uint32_t baud)
+{
+ uart_devices[5].uart_baudrate = baud;
+ g_Upward_uart5_handle = uart_dev_init(Upward_UART_INDEX, Upward_inBuff, UpwardBuffLen);
+}
+
+/**
+ * @brief 得到串口的发送状态
+ * @param device 设备
+ * @retval 0：发生完成 1：发送中 0xFF：错误
+ */
+uint8_t getUartSendState(device_handle device)
+{
+ if (device == g_J1_uart6_handle) {
+ return uartInterruptSendFlag & J1_485_Send;
+ }
+ else if (device == g_J2_uart7_handle) {
+ return uartInterruptSendFlag & J2_485_Send;
+ }
+ else if (device == g_J3_usart2_handle) {
+ return uartInterruptSendFlag & J3_485_Send;
+ }
+ else if (device == g_J4_uart8_handle) {
+ return uartInterruptSendFlag & J4_485_Send;
+ }
+ else if (device == g_J5_0_usart3_handle) {
+ return uartInterruptSendFlag & J5_0_485_Send;
+ }
+ else if (device == g_Upward_uart5_handle) {
+ return uartInterruptSendFlag & Upward_uart_Send;
+ }
+ else {
+ return 0xFF;
+ }
+}
+
+// /**
+// * @brief 设置设备的发送状态
+// * @param
+// state 0：发生完成 1：发送中
+// * @retval
+// */
+// void setUartSendState(device_handle device, uint8_t state)
+// {
+// if (device == g_J1_uart6_handle) {
+// if (state == 1) {
+// uartInterruptSendFlag |= J1_485_Send;
+// }
+// else if (state == 0) {
+// uartInterruptSendFlag &= (~J1_485_Send);
+// }
+// }
+// else if (device == g_J2_uart7_handle) {
+// if (state == 1) {
+// uartInterruptSendFlag |= J2_485_Send;
+// }
+// else if (state == 0) {
+// uartInterruptSendFlag &= (~J2_485_Send);
+// }
+// }
+// else if (device == g_J3_usart2_handle) {
+// if (state == 1) {
+// uartInterruptSendFlag |= J3_485_Send;
+// }
+// else if (state == 0) {
+// uartInterruptSendFlag &= (~J3_485_Send);
+// }
+// }
+// else if (device == g_J4_uart8_handle) {
+// if (state == 1) {
+// uartInterruptSendFlag |= J4_485_Send;
+// }
+// else if (state == 0) {
+// uartInterruptSendFlag &= (~J4_485_Send);
+// }
+// }
+// else if (device == g_J5_0_usart3_handle) {
+// if (state == 1) {
+// uartInterruptSendFlag |= J5_0_485_Send;
+// }
+// else if (state == 0) {
+// uartInterruptSendFlag &= (~J5_0_485_Send);
+// }
+// }
+// else if (device == g_Upward_uart5_handle) {
+// if (state == 1) {
+// uartInterruptSendFlag |= Upward_uart_Send;
+// }
+// else if (state == 0) {
+// uartInterruptSendFlag &= (~Upward_uart_Send);
+// }
+// }
+// }
+
+/**
+ * @brief 得到J2_485的发送状态
+ * @param
+ * @retval 0：发生完成 1：发送中
+ */
+uint8_t getJ1_485_SendState(void)
+{
+ return uartInterruptSendFlag & J1_485_Send;
+}
+
+/**
+ * @brief 设置J2_485的发送状态
+ * @param 0：发生完成 1：发送中
+ * @retval
+ */
+void setJ1_485_SendState(uint8_t state)
+{
+ if (state == 1) {
+ uartInterruptSendFlag |= J1_485_Send;
+ }
+ else if (state == 0) {
+ uartInterruptSendFlag &= (~J1_485_Send);
+ }
+}
+
+/**
+ * @brief 得到J2_485的发送状态
+ * @param
+ * @retval 0：发生完成 1：发送中
+ */
+uint8_t getJ2_485_SendState(void)
+{
+ return uartInterruptSendFlag & J2_485_Send;
+}
+
+/**
+ * @brief 设置J2_485的发送状态
+ * @param 0：发生完成 1：发送中
+ * @retval
+ */
+void setJ2_485_SendState(uint8_t state)
+{
+ if (state == 1) {
+ uartInterruptSendFlag |= J2_485_Send;
+ }
+ else if (state == 0) {
+ uartInterruptSendFlag &= (~J2_485_Send);
+ }
+}
+
+/**
+ * @brief 得到J3_485的发送状态
+ * @param
+ * @retval 0：发生完成 1：发送中
+ */
+uint8_t getJ3_485_SendState(void)
+{
+ return uartInterruptSendFlag & J3_485_Send;
+}
+
+/**
+ * @brief 设置J3_485的发送状态
+ * @param 0：发生完成 1：发送中
+ * @retval
+ */
+void setJ3_485_SendState(uint8_t state)
+{
+ if (state == 1) {
+ uartInterruptSendFlag |= J3_485_Send;
+ }
+ else if (state == 0) {
+ uartInterruptSendFlag &= (~J3_485_Send);
+ }
+}
+
+/**
+ * @brief 得到J4_485的发送状态
+ * @param
+ * @retval 0：发生完成 1：发送中
+ */
+uint8_t getJ4_485_SendState(void)
+{
+ return uartInterruptSendFlag & J4_485_Send;
+}
+
+/**
+ * @brief 设置J4_485的发送状态
+ * @param 0：发生完成 1：发送中
+ * @retval
+ */
+void setJ4_485_SendState(uint8_t state)
+{
+ if (state == 1) {
+ uartInterruptSendFlag |= J4_485_Send;
+ }
+ else if (state == 0) {
+ uartInterruptSendFlag &= (~J4_485_Send);
+ }
+}
+
+/**
+ * @brief 得到J5_0_485的发送状态
+ * @param
+ * @retval 0：发生完成 1：发送中
+ */
+uint8_t getJ5_0_485_SendState(void)
+{
+ return uartInterruptSendFlag & J5_0_485_Send;
+}
+
+/**
+ * @brief 设置J1_485的发送状态
+ * @param 0：发生完成 1：发送中
+ * @retval
+ */
+void setJ5_0_485_SendState(uint8_t state)
+{
+ if (state == 1) {
+ uartInterruptSendFlag |= J5_0_485_Send;
+ }
+ else if (state == 0) {
+ uartInterruptSendFlag &= (~J5_0_485_Send);
+ }
+}
+
+/**
+ * @brief 得到Upward_uart的发送状态
+ * @param
+ * @retval 0：发生完成 1：发送中
+ */
+uint8_t getUpward_uart_SendState(void)
+{
+ return uartInterruptSendFlag & Upward_uart_Send;
+}
+
+/**
+ * @brief 设置Upward_uart的发送状态
+ * @param 0：发生完成 1：发送中
+ * @retval
+ */
+void setUpward_uart_SendState(uint8_t state)
+{
+ if (state == 1) {
+ uartInterruptSendFlag |= Upward_uart_Send;
+ }
+ else if (state == 0) {
+ uartInterruptSendFlag &= (~Upward_uart_Send);
+ }
+}
+
+/* 串口中断处理函数 */
+void J3_Interrupt()
+{
+ /* 数据接收中断 */
+ if (USART_GetITStatus(J3_USART, USART_IT_RXNE) != RESET) {
+ J3_Rbuffer[0] = USART_ReceiveData(J3_USART); //接收数据
+ uart_device_info *dev = (uart_device_info *)g_J3_usart2_handle;
+ if(!RingQueueFull(&dev->uart_ring_queue))
+ InRingQueue(&dev->uart_ring_queue, J3_Rbuffer[0]);
+ }
+
+#ifdef UARTINTERRUPTSEND
+ /* 数据发送中断 */
+ if (USART_GetITStatus(J3_USART, USART_IT_TXE) != RESET) {
+ uart_device_info *dev = (uart_device_info *)g_J3_usart2_handle;
+ if (dev->uart_send_data.count >= dev->uart_send_data.len) {
+ USART_ITConfig(J3_USART, USART_IT_TXE, DISABLE);
+ setJ3_485_SendState(0);
+ return;
+ }
+ USART_SendData(J3_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+#endif
+}
+
+void J5_0_Interrupt()
+{
+ /* 数据接收中断 */
+ if (USART_GetITStatus(J5_0_USART, USART_IT_RXNE) != RESET) { //中断产生
+ J5_0_Rbuffer[0] = USART_ReceiveData(J5_0_USART); //接收数据
+ uart_device_info *dev = (uart_device_info *)g_J5_0_usart3_handle;
+ if(!RingQueueFull(&dev->uart_ring_queue))
+ InRingQueue(&dev->uart_ring_queue, J5_0_Rbuffer[0]);
+ }
+
+#ifdef UARTINTERRUPTSEND
+ /* 数据发送中断 */
+ if (USART_GetITStatus(J5_0_USART, USART_IT_TXE) != RESET) {
+ uart_device_info *dev = (uart_device_info *)g_J5_0_usart3_handle;
+ if (dev->uart_send_data.count >= dev->uart_send_data.len) {
+ USART_ITConfig(J5_0_USART, USART_IT_TXE, DISABLE);
+ setJ5_0_485_SendState(0);
+ return;
+ }
+ USART_SendData(J5_0_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+#endif
+}
+
+void Upward_Interrupt()
+{
+ /* 数据接收中断 */
+ if (USART_GetITStatus(Upward_USART, USART_IT_RXNE) != RESET) { //中断产生
+ Upward_Rbuffer[0] = USART_ReceiveData(Upward_USART); //接收数据
+ uart_device_info *dev = (uart_device_info *)g_Upward_uart5_handle;
+ if(!RingQueueFull(&dev->uart_ring_queue))
+ InRingQueue(&dev->uart_ring_queue, Upward_Rbuffer[0]);
+ }
+
+#ifdef UARTINTERRUPTSEND
+ /* 数据发送中断 */
+ if (USART_GetITStatus(Upward_USART, USART_IT_TXE) != RESET) {
+ uart_device_info *dev = (uart_device_info *)g_Upward_uart5_handle;
+ // log_info("%d \n", dev->uart_send_data.count);
+ if (dev->uart_send_data.count >= dev->uart_send_data.len) {
+ USART_ITConfig(Upward_USART, USART_IT_TXE, DISABLE);
+ setUpward_uart_SendState(0);
+ return;
+ }
+ USART_SendData(Upward_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+#endif
+}
+
+void J1_Interrupt()
+{
+ /* 数据接收中断 */
+ if (USART_GetITStatus(J1_USART, USART_IT_RXNE) != RESET) { //中断产生
+ J1_Rbuffer[0] = USART_ReceiveData(J1_USART); //接收数据
+ uart_device_info *dev = (uart_device_info *)g_J1_uart6_handle;
+ if(!RingQueueFull(&dev->uart_ring_queue))
+ InRingQueue(&dev->uart_ring_queue, J1_Rbuffer[0]);
+ }
+
+#ifdef UARTINTERRUPTSEND
+ /* 数据发送中断 */
+ if (USART_GetITStatus(J1_USART, USART_IT_TXE) != RESET) {
+ uart_device_info *dev = (uart_device_info *)g_J1_uart6_handle;
+ if (dev->uart_send_data.count >= dev->uart_send_data.len) {
+ USART_ITConfig(J1_USART, USART_IT_TXE, DISABLE);
+ setJ1_485_SendState(0);
+ return;
+ }
+ USART_SendData(J1_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+#endif
+}
+
+void J2_Interrupt()
+{
+ /* 数据接收中断 */
+ if (USART_GetITStatus(J2_USART, USART_IT_RXNE) != RESET) { //中断产生
+ J2_Rbuffer[0] = USART_ReceiveData(J2_USART); //接收数据
+ uart_device_info *dev = (uart_device_info *)g_J2_uart7_handle;
+ if(!RingQueueFull(&dev->uart_ring_queue))
+ InRingQueue(&dev->uart_ring_queue, J2_Rbuffer[0]);
+ }
+
+#ifdef UARTINTERRUPTSEND
+ /* 数据发送中断 */
+ if (USART_GetITStatus(J2_USART, USART_IT_TXE) != RESET) {
+ uart_device_info *dev = (uart_device_info *)g_J2_uart7_handle;
+ if (dev->uart_send_data.count >= dev->uart_send_data.len) {
+ USART_ITConfig(J2_USART, USART_IT_TXE, DISABLE);
+ setJ2_485_SendState(0);
+ return;
+ }
+ USART_SendData(J2_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+#endif
+}
+
+void J4_Interrupt()
+{
+ /* 数据接收中断 */
+ if (USART_GetITStatus(J4_USART, USART_IT_RXNE) != RESET) { //中断产生
+ J4_Rbuffer[0] = USART_ReceiveData(J4_USART); //接收数据
+ uart_device_info *dev = (uart_device_info *)g_J4_uart8_handle;
+ if(!RingQueueFull(&dev->uart_ring_queue))
+ InRingQueue(&dev->uart_ring_queue, J4_Rbuffer[0]);
+ }
+
+#ifdef UARTINTERRUPTSEND
+ /* 数据发送中断 */
+ if (USART_GetITStatus(J4_USART, USART_IT_TXE) != RESET) {
+ uart_device_info *dev = (uart_device_info *)g_J4_uart8_handle;
+ if (dev->uart_send_data.count >= dev->uart_send_data.len) {
+ USART_ITConfig(J4_USART, USART_IT_TXE, DISABLE);
+ setJ4_485_SendState(0);
+ return;
+ }
+ USART_SendData(J4_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+#endif
+}
+
+#ifdef UARTINTERRUPTSEND
+/**
+ * @brief 通过中断发送
+ * @param device 设备
+ data 指向数据的指针
+ len 数据长度
+ * @retval 0：成功
+ 1：上次数据还未发送完成
+ 0xFF：错误
+ */
+uint8_t uartInterruptSend(device_handle device,uint8_t *data, uint16_t len)
+{
+ /* 上次未发送完，或设备不存在 */
+ if (getUartSendState(device)) {
+ return getUartSendState(device);
+ }
+
+ /* 指向数据 */
+ uart_device_info *dev = (uart_device_info *)device;
+ dev->uart_send_data.data = data;
+ dev->uart_send_data.count = 0;
+ dev->uart_send_data.len = len;
+
+ /* 开始发送 */
+ if (device == g_J1_uart6_handle) {
+ USART_ITConfig(J1_USART, USART_IT_TXE, ENABLE);
+ USART_SendData(J1_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+ else if (device == g_J2_uart7_handle) {
+ USART_ITConfig(J2_USART, USART_IT_TXE, ENABLE);
+ USART_SendData(J2_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+ else if (device == g_J3_usart2_handle) {
+ USART_ITConfig(J3_USART, USART_IT_TXE, ENABLE);
+ USART_SendData(J3_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+ else if (device == g_J4_uart8_handle) {
+ USART_ITConfig(J4_USART, USART_IT_TXE, ENABLE);
+ USART_SendData(J4_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+ else if (device == g_J5_0_usart3_handle) {
+ USART_ITConfig(J5_0_USART, USART_IT_TXE, ENABLE);
+ USART_SendData(J5_0_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+ else if (device == g_Upward_uart5_handle) {
+ USART_ITConfig(Upward_USART, USART_IT_TXE, ENABLE);
+ USART_SendData(Upward_USART, dev->uart_send_data.data[dev->uart_send_data.count++]);
+ }
+
+ return 0;
+}
+#endif
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_ADC.h b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_ADC.h
new file mode 100644
index 0000000..dc3e8e0
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_ADC.h
@@ -0,0 +1,19 @@
+#ifndef HD_ADC_H_
+#define HD_ADC_H_
+
+#include "ch32v30x.h"
+
+extern uint16_t adcData[];
+extern int16_t Calibrattion_Val;
+
+/* adcɼݵӦ */
+#define PwrOnNum 0
+#define CurrentNum 1
+#define VoltageNum 2
+
+void HD_ADC_InIt(void);
+void ADC_DMA_Init(void);
+void startAdcCapture(void);
+
+
+#endif
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_Flash.h b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_Flash.h
new file mode 100644
index 0000000..9897169
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_Flash.h
@@ -0,0 +1,98 @@
+/*
+ * Flash.h
+ *
+ * Created on: 2024516
+ * Author: 34509
+ */
+
+#ifndef HARDWARE_SPI_FLASH_H_
+#define HARDWARE_SPI_FLASH_H_
+
+#include "ch32v30x.h"
+
+
+/*****************************************
+
+*@Note
+
+ Winbond W25Qxx SPIFLASH
+
+pins:
+
+ CS PA15(SPI3_NSS)
+
+ DO PB4(SPI3_MISO)
+
+ WP 3.3V
+
+ DI PB5(SPI3_MOSI)
+
+ CLK PB3(SPI3_SCK)
+
+ HOLD 3.3V
+
+*******************************************/
+#define RCC_APB2Periph_GPIOX RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB
+#define RCC_APB1Periph_SPIX RCC_APB1Periph_SPI3
+
+#define CS_PIN GPIO_Pin_15
+#define CS_GPIO GPIOA
+
+#define DO_PIN GPIO_Pin_4
+#define DO_GPIO GPIOB
+
+#define DI_PIN GPIO_Pin_5
+#define DI_GPIO GPIOB
+
+#define CLK_PIN GPIO_Pin_3
+#define CLK_GPIO GPIOB
+
+#define SPIX SPI3
+
+/* Winbond SPI Falsh ID */
+#define W25Q80 0XEF13
+#define W25Q16 0XEF14
+#define W25Q32 0XEF15
+#define W25Q64 0XEF16
+#define W25Q128 0XEF17
+
+
+
+/* Winbond SPIFalsh Instruction List ָ */
+#define W25X_WriteEnable 0x06
+#define W25X_WriteDisable 0x04
+#define W25X_ReadStatusReg 0x05
+#define W25X_WriteStatusReg 0x01
+#define W25X_ReadData 0x03
+#define W25X_FastReadData 0x0B
+#define W25X_FastReadDual 0x3B
+#define W25X_PageProgram 0x02
+#define W25X_BlockErase 0xD8
+#define W25X_SectorErase 0x20
+#define W25X_ChipErase 0xC7
+#define W25X_PowerDown 0xB9
+#define W25X_ReleasePowerDown 0xAB
+#define W25X_DeviceID 0xAB
+#define W25X_ManufactDeviceID 0x90
+#define W25X_JedecDeviceID 0x9F
+
+void SPI_Flash_Init(void);
+u8 SPI_ReadWriteByte(u8 TxData);
+u8 SPI_Flash_ReadSR(void);
+void SPI_FLASH_Write_SR(u8 sr);
+void SPI_Flash_Wait_Busy(void);
+void SPI_FLASH_Write_Enable(void);
+void SPI_FLASH_Write_Disable(void);
+u16 SPI_Flash_ReadID(void);
+void SPI_Flash_Erase_Sector(u32 Dst_Addr);
+void SPI_Flash_Read(u8* pBuffer,u32 ReadAddr,u16 size);
+void SPI_Flash_Write_Page(u8* pBuffer,u32 WriteAddr,u16 size);
+void SPI_Flash_Write_NoCheck(u8* pBuffer,u32 WriteAddr,u16 size);
+void SPI_Flash_Write(u8* pBuffer,u32 WriteAddr,u16 size);
+void SPI_Flash_Erase_Chip(void);
+void SPI_Flash_PowerDown(void);
+void SPI_Flash_WAKEUP(void);
+
+void SPI_Flash_TEST(void);
+
+#endif /* HARDWARE_SPI_FLASH_H_ */
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_GPIO.h b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_GPIO.h
new file mode 100644
index 0000000..7c6d9fe
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_GPIO.h
@@ -0,0 +1,54 @@
+#ifndef HD_GPIO_H_
+#define HD_GPIO_H_
+
+#include "ch32v30x.h"
+
+/* Դ */
+#define J1_PwrCtrl_GPIO_PROT GPIOE
+#define J1_PwrCtrl_GPIO_PIN GPIO_Pin_7
+#define J2_PwrCtrl_GPIO_PROT GPIOE
+#define J2_PwrCtrl_GPIO_PIN GPIO_Pin_8
+#define J3_PwrCtrl_GPIO_PROT GPIOE
+#define J3_PwrCtrl_GPIO_PIN GPIO_Pin_9
+#define J4_PwrCtrl_GPIO_PROT GPIOE
+#define J4_PwrCtrl_GPIO_PIN GPIO_Pin_10
+#define J5_PwrCtrl_GPIO_PROT GPIOE
+#define J5_PwrCtrl_GPIO_PIN GPIO_Pin_11
+#define J6_PwrCtrl_GPIO_PROT GPIOE
+#define J6_PwrCtrl_GPIO_PIN GPIO_Pin_12
+#define J7_PwrCtrl_GPIO_PROT GPIOE
+#define J7_PwrCtrl_GPIO_PIN GPIO_Pin_13
+#define J8_PwrCtrl_GPIO_PROT GPIOE
+#define J8_PwrCtrl_GPIO_PIN GPIO_Pin_14
+#define J9_PwrCtrl_GPIO_PROT GPIOE
+#define J9_PwrCtrl_GPIO_PIN GPIO_Pin_15
+
+/* ģ鹩ʹ */
+#define GPIO_PwrCtrl_GPIO_PROT GPIOE
+#define GPIO_PwrCtrl_GPIO_PIN GPIO_Pin_3
+
+/* ģλ */
+#define GPIO_PwrKey_GPIO_PROT GPIOE
+#define GPIO_PwrKey_GPIO_PIN GPIO_Pin_2
+
+/* ι */
+#define WDI_GPIO_PROT GPIOC
+#define WDI_GPIO_PIN GPIO_Pin_13
+
+#define GPIOTypeDef GPIO_TypeDef
+#define GPIOPin uint16_t
+
+/* Bit_SET and Bit_RESET enumeration */
+typedef enum {
+ GPIO_RESET = 0,
+ GPIO_SET
+}BitOperation;
+
+
+
+void HD_GPIO_Init(void);
+void HD_GPIO_Write(GPIOTypeDef *GPIOx, GPIOPin GPIO_Pin, BitOperation BitVal);
+uint8_t HD_InputGPIO_Read(GPIOTypeDef *GPIOx, GPIOPin GPIO_Pin);
+uint8_t HD_OutputGPIO_Read(GPIOTypeDef *GPIOx, GPIOPin GPIO_Pin);
+
+#endif
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_UART.h b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_UART.h
new file mode 100644
index 0000000..9727f4c
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Inc/HD_UART.h
@@ -0,0 +1,103 @@
+#ifndef HARDWARE_RS485_UART_H_
+#define HARDWARE_RS485_UART_H_
+
+#include "ch32v30x.h"
+
+// #define uart4_enable
+
+
+#define J1_USART UART6
+#define J2_USART UART7
+#define J3_USART USART2
+#define J4_USART UART8
+#define J5_0_USART USART3
+#define Upward_USART UART5
+
+/* 6 PE5 */
+#define J1_DE_PROT GPIOE
+#define J1_DE_PIN GPIO_Pin_5
+
+/* 7 PE6 */
+#define J2_DE_PROT GPIOE
+#define J2_DE_PIN GPIO_Pin_6
+
+/* 2 PA1 */
+#define J3_DE_PROT GPIOA
+#define J3_DE_PIN GPIO_Pin_1
+
+/* 8 PE5 */
+#define J4_DE_PROT GPIOB
+#define J4_DE_PIN GPIO_Pin_0
+
+/* 3 ʱ */
+/*
+| A - B - C - YX |
+| 0 - 0 - 0 - J0 |
+| 0 - 0 - 1 - J5 |
+| 0 - 1 - 0 - J6 |
+| 0 - 1 - 1 - J7 |
+| 1 - 0 - 0 - J8 |
+| 1 - 0 - 1 - J9 |
+*/
+#define J5_0_DE_PROT GPIOD
+#define J5_0_DE_PIN GPIO_Pin_8
+#define J5_0_A_PROT GPIOD
+#define J5_0_A_PIN GPIO_Pin_9
+#define J5_0_B_PROT GPIOD
+#define J5_0_B_PIN GPIO_Pin_10
+#define J5_0_C_PROT GPIOD
+#define J5_0_C_PIN GPIO_Pin_11
+
+#define write485 Bit_SET
+#define read485 Bit_RESET
+
+/* J1_UART6 */
+void J1_485_Init(uint32_t baud);
+#define readJ1_485 GPIO_WriteBit(J1_DE_PROT, J1_DE_PIN, read485);
+#define writeJ1_485 GPIO_WriteBit(J1_DE_PROT, J1_DE_PIN, write485);
+
+/* J2_UART7 */
+void J2_485_Init(uint32_t baud);
+#define readJ2_485 GPIO_WriteBit(J2_DE_PROT, J2_DE_PIN, read485);
+#define writeJ2_485 GPIO_WriteBit(J2_DE_PROT, J2_DE_PIN, write485);
+
+/* J3_USART2 */
+void J3_485_Init(uint32_t baud);
+#define readJ3_485 GPIO_WriteBit(J3_DE_PROT, J3_DE_PIN, read485);
+#define writeJ3_485 GPIO_WriteBit(J3_DE_PROT, J3_DE_PIN, write485);
+
+/* J4_UART8 */
+void J4_485_Init(uint32_t baud);
+#define readJ4_485 GPIO_WriteBit(J4_DE_PROT, J4_DE_PIN, read485);
+#define writeJ4_485 GPIO_WriteBit(J4_DE_PROT, J4_DE_PIN, write485);
+
+/* J0-5_USART3 */
+void J5_0_485_Init(uint32_t baud);
+#define readJ5_0_485 GPIO_WriteBit(J5_0_DE_PROT, J5_0_DE_PIN, read485);
+#define writeJ5_0_485 GPIO_WriteBit(J5_0_DE_PROT, J5_0_DE_PIN, write485);
+void USART_CONNET_J0(void);
+void USART_CONNET_J5(void);
+void USART_CONNET_J6(void);
+void USART_CONNET_J7(void);
+void USART_CONNET_J8(void);
+void USART_CONNET_J9(void);
+
+#ifdef uart4_enable
+/* LORA_UART4 */
+void LORA_UART4_Init(uint32_t baud);
+#endif
+
+/* Upward_UART5 */
+void Upward_UART5_Init(uint32_t baud);
+
+extern void J3_Interrupt();
+extern void J5_0_Interrupt();
+extern void Upward_Interrupt();
+extern void J1_Interrupt();
+extern void J2_Interrupt();
+extern void J4_Interrupt();
+
+void USARTx_SendByte(USART_TypeDef* pUSARTx, uint8_t data);
+void USARTx_SendStr_Len(USART_TypeDef* pUSARTx, char *str, int len);
+
+#endif /* HARDWARE_RS485_UART_H_ */
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_ADC.c b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_ADC.c
new file mode 100644
index 0000000..7bb5272
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_ADC.c
@@ -0,0 +1,100 @@
+
+#include "HD_ADC.h"
+
+/* adcУֵ */
+int16_t Calibrattion_Val = 0;
+#define adcNum 3
+/* ͨdmaadcɼݴ */
+uint16_t adcData[adcNum] = {0};
+
+/**
+ * @brief ʼadc
+ * @param
+ * @retval
+ */
+void HD_ADC_InIt(void)
+{
+ ADC_InitTypeDef ADC_InitStructure={0};
+ GPIO_InitTypeDef GPIO_InitStructure={0};
+
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE );
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_ADC1, ENABLE );
+ RCC_ADCCLKConfig(RCC_PCLK2_Div4);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AIN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+ ADC_DeInit(ADC1);
+ ADC_InitStructure.ADC_Mode = ADC_Mode_Independent;
+ ADC_InitStructure.ADC_ScanConvMode = ENABLE;
+ ADC_InitStructure.ADC_ContinuousConvMode = ENABLE;
+ ADC_InitStructure.ADC_ExternalTrigConv = ADC_ExternalTrigConv_None;
+ ADC_InitStructure.ADC_DataAlign = ADC_DataAlign_Right;
+ ADC_InitStructure.ADC_NbrOfChannel = adcNum;
+ ADC_Init(ADC1, &ADC_InitStructure);
+
+ ADC_DMACmd(ADC1, ENABLE);
+ ADC_Cmd(ADC1, ENABLE);
+
+ ADC_BufferCmd(ADC1, DISABLE); //disable buffer
+ ADC_ResetCalibration(ADC1);
+ while(ADC_GetResetCalibrationStatus(ADC1));
+ ADC_StartCalibration(ADC1);
+ while(ADC_GetCalibrationStatus(ADC1));
+ Calibrattion_Val = Get_CalibrationValue(ADC1);
+}
+
+/**
+ * @brief ʼadcdma
+ * @param
+ * @retval
+ */
+void ADC_DMA_Init(void)
+{
+ DMA_InitTypeDef DMA_InitStructure={0};
+
+ RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
+
+ DMA_DeInit(DMA1_Channel1);
+ DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&ADC1->RDATAR;
+ DMA_InitStructure.DMA_MemoryBaseAddr = (uint32_t)adcData;
+ DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
+ DMA_InitStructure.DMA_BufferSize = adcNum;
+ DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+ DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+ DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
+ DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
+ DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
+ DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
+ DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+ DMA_Init(DMA1_Channel1, &DMA_InitStructure);
+}
+
+/**
+ * @brief adcɼ
+ * @param
+ * @retval
+ */
+void startAdcCapture(void)
+{
+ /* ʹadcͨ */
+ DMA_Cmd(DMA1_Channel1 , ENABLE);
+
+ /* ת˳ */
+ ADC_RegularChannelConfig(ADC1, ADC_Channel_0, 1, ADC_SampleTime_239Cycles5);
+ ADC_RegularChannelConfig(ADC1, ADC_Channel_4, 2, ADC_SampleTime_239Cycles5);
+ ADC_RegularChannelConfig(ADC1, ADC_Channel_5, 3, ADC_SampleTime_239Cycles5);
+
+ /* ʹADCdma */
+ ADC_DMACmd(ADC1, ENABLE);
+
+ /* adc */
+ ADC_SoftwareStartConvCmd(ADC1, ENABLE);
+}
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_Flash.c b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_Flash.c
new file mode 100644
index 0000000..969344c
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_Flash.c
@@ -0,0 +1,456 @@
+/*
+ * Flash.c
+ *
+ * Created on: 2024516
+ * Author: 34509
+ */
+#include "HD_Flash.h"
+#include "pDebug.h"
+
+/* Global Variable */
+uint8_t SPI_FLASH_BUF[4096];
+
+void delay_us(uint32_t us) {
+ volatile uint32_t cycles = us * SystemCoreClock / 4000000; // ʵ
+ while (cycles--) {
+ __asm__ volatile ("nop"); // ֹѭŻ
+ }
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_Init
+* Description : Configuring the SPI for operation flash.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_Flash_Init(void)
+{
+ GPIO_InitTypeDef GPIO_InitStructure;
+ SPI_InitTypeDef SPI_InitStructure;
+
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOX, ENABLE );
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_SPIX, ENABLE );
+
+ GPIO_InitStructure.GPIO_Pin = CS_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP; //
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(CS_GPIO, &GPIO_InitStructure);
+ GPIO_SetBits(CS_GPIO, CS_PIN); //CSPA15øߵƽ
+
+ GPIO_InitStructure.GPIO_Pin = CLK_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(CLK_GPIO, &GPIO_InitStructure );
+
+ GPIO_InitStructure.GPIO_Pin = DO_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //
+ GPIO_Init(DO_GPIO, &GPIO_InitStructure );
+
+ GPIO_InitStructure.GPIO_Pin = DI_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_Init(DI_GPIO, &GPIO_InitStructure );
+
+ SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; //SPIͨѶΪ˫ȫ˫ʽ
+ SPI_InitStructure.SPI_Mode = SPI_Mode_Master; //SPIΪģʽ
+ SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; //SPIͨѶ֡СΪ8λ
+ SPI_InitStructure.SPI_CPOL = SPI_CPOL_High; //SPIʱӼΪߵƽ
+ SPI_InitStructure.SPI_CPHA = SPI_CPHA_2Edge; //SPIʱλΪSCKżزɼ
+ SPI_InitStructure.SPI_NSS = SPI_NSS_Soft; //NSSţƬѡţʹģʽΪģʽ
+ SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_4; //òʷƵΪ4Ƶ
+ SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB; //ݴΪλǰ
+ SPI_InitStructure.SPI_CRCPolynomial = 7; //SPICRCУжʽֵ
+ SPI_Init(SPIX, &SPI_InitStructure); //ʼSPI
+
+ SPI_Cmd(SPIX, ENABLE); //ʹSPI3
+}
+
+/*******************************************************************************
+* Function Name : SPIX_ReadWriteByte
+* Description : SPIX read or write one byte.
+* Input : TxData: write one byte data.
+* Return : Read one byte data.
+*******************************************************************************/
+u8 SPI_ReadWriteByte(u8 TxData)
+{
+ u8 i=0;
+ while (SPI_I2S_GetFlagStatus(SPIX, SPI_I2S_FLAG_TXE) == RESET) //ȴͻΪգTXE¼
+ {
+ i++;
+ if(i>200)return 0;
+ }
+ SPI_I2S_SendData(SPIX, TxData); //дݼĴҪдд뷢ͻͨSPI1һ
+ i=0;
+ while (SPI_I2S_GetFlagStatus(SPIX, SPI_I2S_FLAG_RXNE) == RESET) //ȴջǿգRXNE¼
+ {
+ i++;
+ if(i>200)return 0;
+ }
+ return SPI_I2S_ReceiveData(SPIX); //ȡݼĴȡջݣSPI1յ
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_ReadSR
+* Description : Read W25Qxx status register.
+* BIT7 6 5 4 3 2 1 0
+* SPR RV TB BP2 BP1 BP0 WEL BUSY
+* Input : None
+* Return : byte: status register value.
+*******************************************************************************/
+u8 SPI_Flash_ReadSR(void)
+{
+ u8 byte=0;
+
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0); //PA2=0,ʹƬѡź
+ SPI_ReadWriteByte(W25X_ReadStatusReg); //Ͷ״̬Ĵ
+ byte=SPI_ReadWriteByte(0Xff); //ȡһֽ
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1); //ȡƬѡź
+
+ return byte;
+}
+
+/*******************************************************************************
+* Function Name : SPI_FLASH_Write_SR
+* Description : Write W25Qxx status register.
+* Input : sr:status register value.
+* Return : None
+*******************************************************************************/
+void SPI_FLASH_Write_SR(u8 sr)
+{
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_WriteStatusReg); //д״̬Ĵ
+ SPI_ReadWriteByte(sr); //дһֽ
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_Wait_Busy
+* Description : Wait flash free.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_Flash_Wait_Busy(void)
+{
+ while((SPI_Flash_ReadSR()&0x01)==0x01); //ȴFLASH
+}
+
+/*******************************************************************************
+* Function Name : SPI_FLASH_Write_Enable
+* Description : Enable flash write.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_FLASH_Write_Enable(void)
+{
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_WriteEnable); //дʹ
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+}
+
+/*******************************************************************************
+* Function Name : SPI_FLASH_Write_Disable
+* Description : Disable flash write.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_FLASH_Write_Disable(void)
+{
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_WriteDisable); //дָֹ
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_ReadID
+* Description : Read flash ID.
+* Input : None
+* Return : Temp: FLASH ID.
+*******************************************************************************/
+u16 SPI_Flash_ReadID(void)
+{
+ u16 Temp = 0;
+
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_ManufactDeviceID); //ͶȡID
+ SPI_ReadWriteByte(0x00);
+ SPI_ReadWriteByte(0x00);
+ SPI_ReadWriteByte(0x00);
+ Temp|=SPI_ReadWriteByte(0xFF)<<8;
+ Temp|=SPI_ReadWriteByte(0xFF);
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+
+ return Temp;
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_Erase_Sector
+* Description : Erase one sector(4Kbyte).
+* Input : Dst_Addr: 0 2047
+* Return : None
+*******************************************************************************/
+void SPI_Flash_Erase_Sector(u32 Dst_Addr)
+{
+ Dst_Addr*=4096;
+ SPI_FLASH_Write_Enable();
+ SPI_Flash_Wait_Busy();
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_SectorErase); //ָ
+ SPI_ReadWriteByte((u8)((Dst_Addr)>>16)); //24bitַ
+ SPI_ReadWriteByte((u8)((Dst_Addr)>>8));
+ SPI_ReadWriteByte((u8)Dst_Addr);
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+ SPI_Flash_Wait_Busy(); //ȴ
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_Read
+* Description : Read data from flash.
+* Input : pBuffer:
+* ReadAddr:Initial address(24bit).
+* size: Data length.
+* Return : None
+*******************************************************************************/
+void SPI_Flash_Read(u8* pBuffer,u32 ReadAddr,u16 size)
+{
+ u16 i;
+
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_ReadData); //Ͷȡ
+ SPI_ReadWriteByte((u8)((ReadAddr)>>16)); //24bitַ
+ SPI_ReadWriteByte((u8)((ReadAddr)>>8));
+ SPI_ReadWriteByte((u8)ReadAddr);
+
+ for(i=0;i>16)); //24bitַ
+ SPI_ReadWriteByte((u8)((WriteAddr)>>8));
+ SPI_ReadWriteByte((u8)WriteAddr);
+
+ for(i=0;i256)pageremain=256; //һοд256ֽ
+ else pageremain=size; //256ֽ
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_Write
+* Description : Write data to flash.(no need Erase)
+* Input : pBuffer:
+* WriteAddr: Initial address(24bit).
+* size: Data length.
+* Return : None
+*******************************************************************************/
+void SPI_Flash_Write(u8* pBuffer,u32 WriteAddr,u16 size)
+{
+ u32 secpos;
+ u16 secoff;
+ u16 secremain;
+ u16 i;
+
+ secpos=WriteAddr/4096; //ַ
+ secoff=WriteAddr%4096; //ڵı
+ secremain=4096-secoff; //ʣռС
+
+ if(size<=secremain)secremain=size; //4096ֽ
+
+ while(1)
+ {
+ SPI_Flash_Read(SPI_FLASH_BUF,secpos*4096,4096); //
+
+ for(i=0;i4096)
+ {
+ secremain=4096; //һд
+ }
+ else
+ {
+ secremain=size; //һд
+ }
+ }
+ }
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_Erase_Chip
+* Description : Erase all FLASH pages.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_Flash_Erase_Chip(void)
+{
+ SPI_FLASH_Write_Enable();
+ SPI_Flash_Wait_Busy();
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_ChipErase); //Ƭָ
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+ SPI_Flash_Wait_Busy();
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_PowerDown
+* Description : Enter power down mode.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_Flash_PowerDown(void)
+{
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_PowerDown); //ͽϵģʽ֮
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+ delay_us(3);
+}
+
+/*******************************************************************************
+* Function Name : SPI_Flash_WAKEUP
+* Description : Power down wake up.
+* Input : None
+* Return : None
+*******************************************************************************/
+void SPI_Flash_WAKEUP(void)
+{
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 0);
+ SPI_ReadWriteByte(W25X_ReleasePowerDown); //Ͷϵ绽ָ
+ GPIO_WriteBit(CS_GPIO, CS_PIN, 1);
+ delay_us(3);
+}
+
+void SPI_Flash_TEST(void)
+{
+ const int SIZE = 100;
+ u8 TEXT_Buf[100] = "hello world \n";
+ u8 datap[SIZE];
+ u16 Flash_Model;
+ SPI_Flash_Init();
+ Flash_Model = SPI_Flash_ReadID();
+ log_info("SPI_Flash_ReadID = %x \n", Flash_Model);
+ switch(Flash_Model)
+ {
+ case W25Q80:
+ log_info("W25Q80 OK!\r\n");
+ break;
+ case W25Q16:
+ log_info("W25Q16 OK!\r\n");
+ break;
+ case W25Q32:
+ log_info("W25Q32 OK!\r\n");
+ break;
+ case W25Q64:
+ log_info("W25Q64 OK!\r\n");
+ break;
+ case W25Q128:
+ log_info("W25Q128 OK!\r\n");
+ break;
+ default:
+ log_info("Fail!\r\n");
+ break;
+ }
+
+ log_info("Start Erase W25Qxx....\r\n");
+ SPI_Flash_Erase_Sector(0);
+ log_info("W25Qxx Erase Finished!\r\n");
+
+ delay_us(500);
+ log_info("Start Write W25Qxx....\r\n");
+ SPI_Flash_Write((u8*)TEXT_Buf,0,SIZE);
+ log_info("W25Qxx Write Finished!\r\n");
+
+ delay_us(500);
+ log_info("Start Read W25Qxx....\r\n");
+ SPI_Flash_Read(datap,0x0,SIZE);
+ log_info("READ:%s\r\n", datap );
+}
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_GPIO.c b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_GPIO.c
new file mode 100644
index 0000000..f0df871
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_GPIO.c
@@ -0,0 +1,95 @@
+#include "HD_GPIO.h"
+
+void HD_GPIO_Init(void)
+{
+ GPIO_InitTypeDef GPIO_InitStructure;
+
+ /* ģԴʹţĬϲʹ */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
+ GPIO_InitStructure.GPIO_Pin = GPIO_PwrCtrl_GPIO_PIN;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_10MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_Init(GPIO_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(GPIO_PwrCtrl_GPIO_PROT, GPIO_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ /* λģţĬϵ͵ƽ */
+ GPIO_InitStructure.GPIO_Pin = GPIO_PwrKey_GPIO_PIN;
+ GPIO_Init(GPIO_PwrKey_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(GPIO_PwrKey_GPIO_PROT, GPIO_PwrKey_GPIO_PIN, Bit_RESET);
+
+ /* ԴţĬϲԴ */
+ GPIO_InitStructure.GPIO_Pin = J1_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J1_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J1_PwrCtrl_GPIO_PROT, J1_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J2_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J2_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J2_PwrCtrl_GPIO_PROT, J2_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J3_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J3_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J3_PwrCtrl_GPIO_PROT, J3_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J4_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J4_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J4_PwrCtrl_GPIO_PROT, J4_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J5_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J5_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J5_PwrCtrl_GPIO_PROT, J5_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J6_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J6_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J6_PwrCtrl_GPIO_PROT, J6_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J7_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J7_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J7_PwrCtrl_GPIO_PROT, J7_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J8_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J8_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J8_PwrCtrl_GPIO_PROT, J8_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ GPIO_InitStructure.GPIO_Pin = J9_PwrCtrl_GPIO_PIN;
+ GPIO_Init(J9_PwrCtrl_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(J9_PwrCtrl_GPIO_PROT, J9_PwrCtrl_GPIO_PIN, Bit_RESET);
+
+ /* ι */
+ GPIO_InitStructure.GPIO_Pin = WDI_GPIO_PIN;
+ GPIO_Init(WDI_GPIO_PROT, &GPIO_InitStructure);
+ GPIO_WriteBit(WDI_GPIO_PROT, WDI_GPIO_PIN, Bit_SET);
+}
+
+/**
+ * @brief IOƽ
+ * @param GPIOx
+ GPIO_Pin
+ BitVal
+ * @retval
+ */
+void HD_GPIO_Write(GPIOTypeDef *GPIOx, GPIOPin GPIO_Pin, BitOperation BitVal)
+{
+ GPIO_WriteBit(GPIOx, GPIO_Pin, BitVal);
+}
+
+/**
+ * @brief õIOƽ
+ * @param GPIOx
+ GPIO_Pin
+ * @retval
+ */
+uint8_t HD_InputGPIO_Read(GPIOTypeDef *GPIOx, GPIOPin GPIO_Pin)
+{
+ return GPIO_ReadInputDataBit(GPIOx, GPIO_Pin);
+}
+
+/**
+ * @brief õIOƽ
+ * @param GPIOx
+ GPIO_Pin
+ * @retval
+ */
+uint8_t HD_OutputGPIO_Read(GPIOTypeDef *GPIOx, GPIOPin GPIO_Pin)
+{
+ return GPIO_ReadOutputDataBit(GPIOx, GPIO_Pin);
+}
diff --git a/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_UART.c b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_UART.c
new file mode 100644
index 0000000..2f0ebfe
--- /dev/null
+++ b/CH32V303-FreeRTOS/App/hardwareDriver/Src/HD_UART.c
@@ -0,0 +1,562 @@
+#include "HD_UART.h"
+
+void USART2_IRQHandler(void) __attribute__((interrupt()));
+void USART3_IRQHandler(void) __attribute__((interrupt()));
+#ifdef uart4_enable
+// void UART4_IRQHandler(void) __attribute__((interrupt("WCH-Interrupt-fast")));
+void UART4_IRQHandler(void) __attribute__((interrupt()));
+#endif
+void UART5_IRQHandler(void) __attribute__((interrupt()));
+void UART6_IRQHandler(void) __attribute__((interrupt()));
+void UART7_IRQHandler(void) __attribute__((interrupt()));
+void UART8_IRQHandler(void) __attribute__((interrupt()));
+
+#define write Bit_SET
+#define read Bit_RESET
+
+/*
+ * @brief ʼUART6ӦJ1_485,ĬΪ
+ * @param baud
+ * @retval
+ *
+ */
+void J1_485_Init(uint32_t baud)
+{
+ /* ʼDE */
+ GPIO_InitTypeDef GPIO_InitStructure;
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
+ GPIO_InitStructure.GPIO_Pin = J1_DE_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
+ GPIO_Init(J1_DE_PROT, &GPIO_InitStructure);
+ readJ1_485;
+
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* UART6 TX --> PC0 RX --> PC1 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART6, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PC0Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PC1Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(UART6, &USART_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = UART6_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=3; //ռȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //ȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_ITConfig(UART6, USART_IT_RXNE, ENABLE);
+
+ USART_Cmd(UART6,ENABLE);
+}
+
+
+/*
+ * @brief ʼUART7ӦJ2_485,ĬΪգԴر״̬
+ * @param baud
+ * @retval
+ *
+ */
+void J2_485_Init(uint32_t baud)
+{
+ /* ʼDE */
+ GPIO_InitTypeDef GPIO_InitStructure;
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOE, ENABLE);
+ GPIO_InitStructure.GPIO_Pin = J2_DE_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
+ GPIO_Init(J2_DE_PROT, &GPIO_InitStructure);
+ readJ2_485;
+
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* UART7 TX --> PC2 RX --> PC3 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART7, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PC2Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PC3Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(UART7, &USART_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = UART7_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=3; //ռȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //ȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_ITConfig(UART7, USART_IT_RXNE, ENABLE);
+
+ USART_Cmd(UART7,ENABLE);
+}
+
+/*
+ * @brief ʼUSART2ӦJ3_485,ĬΪգԴر״̬
+ * @param baud
+ * @retval
+ *
+ */
+void J3_485_Init(uint32_t baud)
+{
+ /* ʼDE */
+ GPIO_InitTypeDef GPIO_InitStructure;
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
+ GPIO_InitStructure.GPIO_Pin = J3_DE_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
+ GPIO_Init(J3_DE_PROT, &GPIO_InitStructure);
+ readJ3_485;
+
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* USART2 TX --> PA2 RX --> PA3 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART2, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PA2Ϊ
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_3;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PA3Ϊ
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(USART2, &USART_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = USART2_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=3; //ռȼΪ1
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //ȼΪ1
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_ITConfig(USART2, USART_IT_RXNE, ENABLE);
+
+ USART_Cmd(USART2,ENABLE);
+}
+
+/*
+ * @brief ʼUART8ӦJ4_485,ĬΪգԴر״̬
+ * @param baud
+ * @retval
+ *
+ */
+void J4_485_Init(uint32_t baud)
+{
+ /* ʼDE */
+ GPIO_InitTypeDef GPIO_InitStructure;
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
+ GPIO_InitStructure.GPIO_Pin = J4_DE_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
+ GPIO_Init(J4_DE_PROT, &GPIO_InitStructure);
+ readJ4_485;
+
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* UART8 TX --> PC4 RX --> PC5 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART8, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PC4Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PC5Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(UART8, &USART_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = UART8_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=3; //ռȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //ȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_ITConfig(UART8, USART_IT_RXNE, ENABLE);
+
+ USART_Cmd(UART8,ENABLE);
+}
+
+/*
+ * @brief ʼUSART3ڿJ5-06485ӿ,ÿƵ485ΪJ0Դȫر
+ * @param baud
+ * @retval
+ *
+ */
+void J5_0_485_Init(uint32_t baud)
+{
+ /* ʼDE */
+ GPIO_InitTypeDef GPIO_InitStructure;
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD,ENABLE);
+ GPIO_InitStructure.GPIO_Pin = J5_0_DE_PIN;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
+ GPIO_InitStructure.GPIO_Speed=GPIO_Speed_50MHz;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ readJ5_0_485;
+ GPIO_InitStructure.GPIO_Pin = J5_0_A_PIN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = J5_0_B_PIN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ GPIO_InitStructure.GPIO_Pin = J5_0_C_PIN;
+ GPIO_Init(GPIOA, &GPIO_InitStructure);
+ USART_CONNET_J0();
+
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* USART3 TX --> PB10 RX --> PB11 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOB, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_USART3, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PB10Ϊ
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PB11Ϊ
+ GPIO_Init(GPIOB, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(USART3, &USART_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = USART3_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=1; //ռȼΪ1
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1; //ȼΪ1
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_ITConfig(USART3, USART_IT_RXNE, ENABLE);
+// USART_ITConfig(USART3, USART_IT_IDLE, ENABLE);
+
+ USART_Cmd(USART3,ENABLE);
+}
+/*
+ * Function Name : USART_CONNET_J0
+ * Description : ƴ3J0Ӧ485.
+ * Input : None
+ * Return : None
+ **/
+void USART_CONNET_J0(void)
+{
+ GPIO_WriteBit(J5_0_A_PROT, J5_0_A_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_B_PROT, J5_0_B_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_C_PROT, J5_0_C_PIN, Bit_RESET);
+}
+
+/*
+ * Function Name : USART_CONNET_J5
+ * Description : ƴ3J5Ӧ485.
+ * Input : None
+ * Return : None
+ **/
+void USART_CONNET_J5(void)
+{
+ GPIO_WriteBit(J5_0_A_PROT, J5_0_A_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_B_PROT, J5_0_B_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_C_PROT, J5_0_C_PIN, Bit_SET);
+}
+
+/*
+ * Function Name : USART_CONNET_J6
+ * Description : ƴ3J6Ӧ485.
+ * Input : None
+ * Return : None
+ **/
+void USART_CONNET_J6(void)
+{
+ GPIO_WriteBit(J5_0_A_PROT, J5_0_A_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_B_PROT, J5_0_B_PIN, Bit_SET);
+ GPIO_WriteBit(J5_0_C_PROT, J5_0_C_PIN, Bit_RESET);
+}
+
+/*
+ * Function Name : USART_CONNET_J7
+ * Description : ƴ3J7Ӧ485.
+ * Input : None
+ * Return : None
+ **/
+void USART_CONNET_J7(void)
+{
+ GPIO_WriteBit(J5_0_A_PROT, J5_0_A_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_B_PROT, J5_0_B_PIN, Bit_SET);
+ GPIO_WriteBit(J5_0_C_PROT, J5_0_C_PIN, Bit_SET);
+}
+
+/*
+ * Function Name : USART_CONNET_J8
+ * Description : ƴ3J8Ӧ485.
+ * Input : None
+ * Return : None
+ **/
+void USART_CONNET_J8(void)
+{
+ GPIO_WriteBit(J5_0_A_PROT, J5_0_A_PIN, Bit_SET);
+ GPIO_WriteBit(J5_0_B_PROT, J5_0_B_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_C_PROT, J5_0_C_PIN, Bit_RESET);
+}
+
+/*
+ * Function Name : USART_CONNET_J9
+ * Description : ƴ3J9Ӧ485.
+ * Input : None
+ * Return : None
+ **/
+void USART_CONNET_J9(void)
+{
+ GPIO_WriteBit(J5_0_A_PROT, J5_0_A_PIN, Bit_SET);
+ GPIO_WriteBit(J5_0_B_PROT, J5_0_B_PIN, Bit_RESET);
+ GPIO_WriteBit(J5_0_C_PROT, J5_0_C_PIN, Bit_SET);
+}
+
+
+#ifdef uart4_enable
+/*
+ * @brief ʼUART4ӦLORA
+ * @param baud
+ * @retval
+ *
+ */
+void LORA_UART4_Init(uint32_t baud)
+{
+ GPIO_InitTypeDef GPIO_InitStructure;
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* UART4 TX --> PC10 RX --> PC11 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART4, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_10;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PC10Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_11;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PC11Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(UART4, &USART_InitStructure);
+
+ NVIC_InitStructure.NVIC_IRQChannel = UART4_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=3; //ռȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //ȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_ITConfig(UART4, USART_IT_RXNE, ENABLE);
+
+ USART_Cmd(UART4,ENABLE);
+}
+#endif
+
+/*
+ * @brief ʼUART5ӦĶϴ
+ * @param baud
+ * @retval
+ *
+ */
+void Upward_UART5_Init(uint32_t baud)
+{
+ GPIO_InitTypeDef GPIO_InitStructure;
+ USART_InitTypeDef USART_InitStructure;
+ NVIC_InitTypeDef NVIC_InitStructure;
+
+ /* UART5 TX --> PC12 RX --> PD2 */
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD, ENABLE);
+ RCC_APB1PeriphClockCmd(RCC_APB1Periph_UART5, ENABLE);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_12;
+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; //PC12Ϊ
+ GPIO_Init(GPIOC, &GPIO_InitStructure);
+
+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_2;
+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING; //PD2Ϊ
+ GPIO_Init(GPIOD, &GPIO_InitStructure);
+
+ USART_InitStructure.USART_BaudRate = baud;
+ USART_InitStructure.USART_WordLength = USART_WordLength_8b;
+ USART_InitStructure.USART_StopBits = USART_StopBits_1;
+ USART_InitStructure.USART_Parity = USART_Parity_No;
+ USART_InitStructure.USART_HardwareFlowControl = USART_HardwareFlowControl_None;
+ USART_InitStructure.USART_Mode = USART_Mode_Tx | USART_Mode_Rx;
+ USART_Init(UART5, &USART_InitStructure);
+
+ USART_ITConfig(UART5, USART_IT_RXNE, ENABLE);
+
+ NVIC_InitStructure.NVIC_IRQChannel = UART5_IRQn;
+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority=1; //ռȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 3; //ȼΪ3
+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE; //IRQͨʹ
+ NVIC_Init(&NVIC_InitStructure); //жȼʼ
+
+ USART_Cmd(UART5,ENABLE);
+}
+
+
+
+void USART2_IRQHandler(void)
+{
+ J3_Interrupt();
+}
+
+void USART3_IRQHandler(void)
+{
+ J5_0_Interrupt();
+}
+
+#ifdef uart4_enable
+void UART4_IRQHandler(void)
+{
+
+}
+#endif
+
+void UART5_IRQHandler(void)
+{
+ Upward_Interrupt();
+}
+
+void UART6_IRQHandler(void)
+{
+ J1_Interrupt();
+}
+
+void UART7_IRQHandler(void)
+{
+ J2_Interrupt();
+}
+
+void UART8_IRQHandler(void)
+{
+ J4_Interrupt();
+}
+
+
+/*
+ * @brief һַ
+ * @param pUSARTx
+ data ַ
+ * @retval
+ *
+ */
+void USARTx_SendByte(USART_TypeDef* pUSARTx, uint8_t data)
+{
+ while(USART_GetFlagStatus(pUSARTx, USART_FLAG_TXE) == RESET) /* waiting for sending finish */
+ {
+ }
+ USART_SendData(pUSARTx, data);
+}
+
+/*
+ * @brief ַ
+ * @param pUSARTx
+ data ַ
+ len ַij
+ * @retval
+ *
+ */
+void USARTx_SendStr_Len(USART_TypeDef* pUSARTx, char *str, int len)
+{
+ if (pUSARTx == J1_USART) {
+ writeJ1_485;
+ } else if (pUSARTx == J2_USART) {
+ writeJ2_485;
+ } else if (pUSARTx == J3_USART) {
+ writeJ3_485;
+ } else if (pUSARTx == J4_USART) {
+ writeJ4_485;
+ } else if (pUSARTx == J5_0_USART) {
+ writeJ5_0_485;
+ }
+
+ for (int i = 0; i < len; i++) {
+ USARTx_SendByte(pUSARTx, str[i]);
+ }
+
+ if (pUSARTx == J1_USART) {
+ readJ1_485;
+ } else if (pUSARTx == J2_USART) {
+ readJ2_485;
+ } else if (pUSARTx == J3_USART) {
+ readJ3_485;
+ } else if (pUSARTx == J4_USART) {
+ readJ4_485;
+ } else if (pUSARTx == J5_0_USART) {
+ readJ5_0_485;
+ }
+}
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/CH32V303-FreeRTOS/App/tools/comm_types.h b/CH32V303-FreeRTOS/App/tools/comm_types.h
index a8f100a..7065781 100644
--- a/CH32V303-FreeRTOS/App/tools/comm_types.h
+++ b/CH32V303-FreeRTOS/App/tools/comm_types.h
@@ -5,13 +5,13 @@
typedef unsigned long int ulong;
typedef unsigned short int ushort;
typedef unsigned int uint;
-typedef unsigned char u_int8_t;
+// typedef unsigned char u_int8_t;
typedef unsigned char uint8_t;
-typedef unsigned short int u_int16_t;
+// typedef unsigned short int u_int16_t;
typedef unsigned short int uint16_t;
-typedef unsigned int u_int32_t;
-typedef unsigned int uint32_t;
-typedef unsigned long long u_int64_t;
+// typedef unsigned int u_int32_t;
+// typedef unsigned int uint32_t;
+// typedef unsigned long long u_int64_t;
typedef unsigned long long uint64_t;
typedef unsigned char BOOL;
typedef float float_t;
diff --git a/CH32V303-FreeRTOS/App/tools/pDebug.h b/CH32V303-FreeRTOS/App/tools/pDebug.h
index 4cdae3f..abab635 100644
--- a/CH32V303-FreeRTOS/App/tools/pDebug.h
+++ b/CH32V303-FreeRTOS/App/tools/pDebug.h
@@ -29,9 +29,13 @@
#define log_warn(M, ...) do {}while(0)
#define log_info(M, ...) do {}while(0)
#else
-#define log_info(M, ...) {if(log_info_enable){char *p = strrchr(__FILE__, '\\'); debug_printf("[INFO] [%s:%d] " M "\r\n", p+1, __LINE__, ##__VA_ARGS__);}}
-#define log_warn(M, ...) {if(log_warn_enable){char *p = strrchr(__FILE__, '\\'); debug_printf("[WARN] [%s:%d] " M "\r\n", p+1, __LINE__, ##__VA_ARGS__);}}
-#define log_error(M, ...) {if(log_error_enable){char *p = strrchr(__FILE__, '\\'); debug_printf("[ERROR] [%s:%d] " M "\r\n", p+1, __LINE__,##__VA_ARGS__);}}
+// #define log_info(M, ...) {if(log_info_enable){char *p = strrchr(__FILE__, '\\'); debug_printf("[INFO] [%s:%d] " M "\r\n", p+1, __LINE__, ##__VA_ARGS__);}}
+// #define log_warn(M, ...) {if(log_warn_enable){char *p = strrchr(__FILE__, '\\'); debug_printf("[WARN] [%s:%d] " M "\r\n", p+1, __LINE__, ##__VA_ARGS__);}}
+// #define log_error(M, ...) {if(log_error_enable){char *p = strrchr(__FILE__, '\\'); debug_printf("[ERROR] [%s:%d] " M "\r\n", p+1, __LINE__,##__VA_ARGS__);}}
+
+#define log_info(M, ...) {if(log_info_enable){char *p = strrchr(__FILE__, '\\'); printf("[INFO] [%s:%d] " M "\r\n", p+1, __LINE__, ##__VA_ARGS__);}}
+#define log_warn(M, ...) {if(log_warn_enable){char *p = strrchr(__FILE__, '\\'); printf("[WARN] [%s:%d] " M "\r\n", p+1, __LINE__, ##__VA_ARGS__);}}
+#define log_error(M, ...) {if(log_error_enable){char *p = strrchr(__FILE__, '\\'); printf("[ERROR] [%s:%d] " M "\r\n", p+1, __LINE__,##__VA_ARGS__);}}
#endif
#endif
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/CH32V303-FreeRTOS.wvproj b/CH32V303-FreeRTOS/CH32V303-FreeRTOS.wvproj
index c9dd285..e20531d 100644
--- a/CH32V303-FreeRTOS/CH32V303-FreeRTOS.wvproj
+++ b/CH32V303-FreeRTOS/CH32V303-FreeRTOS.wvproj
@@ -127,7 +127,9 @@
"${project}/FreeRTOS/portable/MemMang",
"${project}/App/hardwareDriver/Inc",
"${project}/App/tools",
- "${project}/App/tools/RingQueue"
+ "${project}/App/tools/RingQueue",
+ "${project}/App",
+ "${project}/App/functionalModule/Inc"
],
"include_system_paths": [],
"include_files": []
@@ -159,7 +161,12 @@
"${project}/FreeRTOS/portable/Common",
"${project}/FreeRTOS/portable/GCC/RISC-V",
"${project}/FreeRTOS/portable/GCC/RISC-V/chip_specific_extensions/RV32I_PFIC_no_extensions",
- "${project}/FreeRTOS/portable/MemMang"
+ "${project}/FreeRTOS/portable/MemMang",
+ "${project}/App/hardwareDriver/Inc",
+ "${project}/App/tools",
+ "${project}/App/tools/RingQueue",
+ "${project}/App/functionalModule/Inc",
+ "${project}/App/application/Inc"
],
"include_system_paths": [],
"include_files": []
@@ -718,10 +725,8 @@
"ATTR_BUILD_BEFORE_LAUNCH_ATTR": 2,
"GdbServerAllocateConsole": true,
"GdbServerAllocateTelnetConsole": false,
- "SkipDownloadBeforeDebug": false,
"StartGdbCLient": true,
- "UPDATE_THREADLIST_ON_SUSPEND": false,
- "DebugInRam": false
+ "UPDATE_THREADLIST_ON_SUSPEND": false
}
}
}
\ No newline at end of file
diff --git a/CH32V303-FreeRTOS/Ld/Link.ld b/CH32V303-FreeRTOS/Ld/Link.ld
index 7748497..9969e15 100644
--- a/CH32V303-FreeRTOS/Ld/Link.ld
+++ b/CH32V303-FreeRTOS/Ld/Link.ld
@@ -1 +1,186 @@
-ENTRY( _start )
__stack_size = 2048;
PROVIDE( _stack_size = __stack_size );
MEMORY
{
/* CH32V30x_D8C - CH32V305RB-CH32V305FB
CH32V30x_D8 - CH32V303CB-CH32V303RB
*/
/**/
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
/* CH32V30x_D8C - CH32V307VC-CH32V307WC-CH32V307RC-CH32V305CC
CH32V30x_D8 - CH32V303VC-CH32V303RC
FLASH + RAM supports the following configuration
For specific choices, please refer :CH32FV2x_V3xRM.PDF\Table 32-3
FLASH-192K + RAM-128K
FLASH-224K + RAM-96K
FLASH-256K + RAM-64K
FLASH-288K + RAM-32K
FLASH-128K + RAM-192K
FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 288K
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K*/
}
SECTIONS
{
.init :
{
_sinit = .;
. = ALIGN(4);
KEEP(*(SORT_NONE(.init)))
. = ALIGN(4);
_einit = .;
} >FLASH AT>FLASH
.vector :
{
*(.vector);
. = ALIGN(64);
} >FLASH AT>FLASH
.text :
{
. = ALIGN(4);
*(.text)
*(.text.*)
*(.rodata)
*(.rodata*)
*(.gnu.linkonce.t.*)
. = ALIGN(4);
} >FLASH AT>FLASH
.fini :
{
KEEP(*(SORT_NONE(.fini)))
. = ALIGN(4);
} >FLASH AT>FLASH
PROVIDE( _etext = . );
PROVIDE( _eitcm = . );
.preinit_array :
{
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array))
PROVIDE_HIDDEN (__preinit_array_end = .);
} >FLASH AT>FLASH
.init_array :
{
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
PROVIDE_HIDDEN (__init_array_end = .);
} >FLASH AT>FLASH
.fini_array :
{
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
PROVIDE_HIDDEN (__fini_array_end = .);
} >FLASH AT>FLASH
.ctors :
{
/* gcc uses crtbegin.o to find the start of
the constructors, so we make sure it is
first. Because this is a wildcard, it
doesn't matter if the user does not
actually link against crtbegin.o; the
linker won't look for a file to match a
wildcard. The wildcard also means that it
doesn't matter which directory crtbegin.o
is in. */
KEEP (*crtbegin.o(.ctors))
KEEP (*crtbegin?.o(.ctors))
/* We don't want to include the .ctor section from
the crtend.o file until after the sorted ctors.
The .ctor section from the crtend file contains the
end of ctors marker and it must be last */
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
} >FLASH AT>FLASH
.dtors :
{
KEEP (*crtbegin.o(.dtors))
KEEP (*crtbegin?.o(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
} >FLASH AT>FLASH
.dalign :
{
. = ALIGN(4);
PROVIDE(_data_vma = .);
} >RAM AT>FLASH
.dlalign :
{
. = ALIGN(4);
PROVIDE(_data_lma = .);
} >FLASH AT>FLASH
.data :
{
*(.gnu.linkonce.r.*)
*(.data .data.*)
*(.gnu.linkonce.d.*)
. = ALIGN(8);
PROVIDE( __global_pointer$ = . + 0x800 );
*(.sdata .sdata.*)
*(.sdata2.*)
*(.gnu.linkonce.s.*)
. = ALIGN(8);
*(.srodata.cst16)
*(.srodata.cst8)
*(.srodata.cst4)
*(.srodata.cst2)
*(.srodata .srodata.*)
. = ALIGN(4);
PROVIDE( _edata = .);
} >RAM AT>FLASH
.bss :
{
. = ALIGN(4);
PROVIDE( _sbss = .);
*(.sbss*)
*(.gnu.linkonce.sb.*)
*(.bss*)
*(.gnu.linkonce.b.*)
*(COMMON*)
. = ALIGN(4);
PROVIDE( _ebss = .);
} >RAM AT>FLASH
PROVIDE( _end = _ebss);
PROVIDE( end = . );
.stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
{
PROVIDE( _heap_end = . );
. = ALIGN(4);
PROVIDE(_susrstack = . );
. = . + __stack_size;
PROVIDE( _eusrstack = .);
__freertos_irq_stack_top = .;
} >RAM
}
\ No newline at end of file
+ENTRY( _start )
+
+__stack_size = 2048;
+
+PROVIDE( _stack_size = __stack_size );
+
+
+MEMORY
+{
+/* CH32V30x_D8C - CH32V305RB-CH32V305FB
+ CH32V30x_D8 - CH32V303CB-CH32V303RB
+*/
+/**/
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 128K
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
+
+
+/* CH32V30x_D8C - CH32V307VC-CH32V307WC-CH32V307RC-CH32V305CC
+ CH32V30x_D8 - CH32V303VC-CH32V303RC
+ FLASH + RAM supports the following configuration
+ For specific choices, please refer :CH32FV2x_V3xRM.PDF\Table 32-3
+ FLASH-192K + RAM-128K
+ FLASH-224K + RAM-96K
+ FLASH-256K + RAM-64K
+ FLASH-288K + RAM-32K
+ FLASH-128K + RAM-192K
+
+ FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 288K
+ RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K*/
+}
+
+
+SECTIONS
+{
+
+ .init :
+ {
+ _sinit = .;
+ . = ALIGN(4);
+ KEEP(*(SORT_NONE(.init)))
+ . = ALIGN(4);
+ _einit = .;
+ } >FLASH AT>FLASH
+
+ .vector :
+ {
+ *(.vector);
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+ } >FLASH AT>FLASH
+
+ .text :
+ {
+ . = ALIGN(4);
+ *(.text)
+ *(.text.*)
+ *(.rodata)
+ *(.rodata*)
+ *(.gnu.linkonce.t.*)
+ . = ALIGN(4);
+ } >FLASH AT>FLASH
+
+ .fini :
+ {
+ KEEP(*(SORT_NONE(.fini)))
+ . = ALIGN(4);
+ } >FLASH AT>FLASH
+
+ PROVIDE( _etext = . );
+ PROVIDE( _eitcm = . );
+
+ .preinit_array :
+ {
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+ KEEP (*(.preinit_array))
+ PROVIDE_HIDDEN (__preinit_array_end = .);
+ } >FLASH AT>FLASH
+
+ .init_array :
+ {
+ PROVIDE_HIDDEN (__init_array_start = .);
+ KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+ KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
+ PROVIDE_HIDDEN (__init_array_end = .);
+ } >FLASH AT>FLASH
+
+ .fini_array :
+ {
+ PROVIDE_HIDDEN (__fini_array_start = .);
+ KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
+ KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
+ PROVIDE_HIDDEN (__fini_array_end = .);
+ } >FLASH AT>FLASH
+
+ .ctors :
+ {
+ /* gcc uses crtbegin.o to find the start of
+ the constructors, so we make sure it is
+ first. Because this is a wildcard, it
+ doesn't matter if the user does not
+ actually link against crtbegin.o; the
+ linker won't look for a file to match a
+ wildcard. The wildcard also means that it
+ doesn't matter which directory crtbegin.o
+ is in. */
+ KEEP (*crtbegin.o(.ctors))
+ KEEP (*crtbegin?.o(.ctors))
+ /* We don't want to include the .ctor section from
+ the crtend.o file until after the sorted ctors.
+ The .ctor section from the crtend file contains the
+ end of ctors marker and it must be last */
+ KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+ KEEP (*(SORT(.ctors.*)))
+ KEEP (*(.ctors))
+ } >FLASH AT>FLASH
+
+ .dtors :
+ {
+ KEEP (*crtbegin.o(.dtors))
+ KEEP (*crtbegin?.o(.dtors))
+ KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+ KEEP (*(SORT(.dtors.*)))
+ KEEP (*(.dtors))
+ } >FLASH AT>FLASH
+
+ .dalign :
+ {
+ . = ALIGN(4);
+ PROVIDE(_data_vma = .);
+ } >RAM AT>FLASH
+
+ .dlalign :
+ {
+ . = ALIGN(4);
+ PROVIDE(_data_lma = .);
+ } >FLASH AT>FLASH
+
+ .data :
+ {
+ *(.gnu.linkonce.r.*)
+ *(.data .data.*)
+ *(.gnu.linkonce.d.*)
+ . = ALIGN(8);
+ PROVIDE( __global_pointer$ = . + 0x800 );
+ *(.sdata .sdata.*)
+ *(.sdata2.*)
+ *(.gnu.linkonce.s.*)
+ . = ALIGN(8);
+ *(.srodata.cst16)
+ *(.srodata.cst8)
+ *(.srodata.cst4)
+ *(.srodata.cst2)
+ *(.srodata .srodata.*)
+ . = ALIGN(4);
+ PROVIDE( _edata = .);
+ } >RAM AT>FLASH
+
+ .bss :
+ {
+ . = ALIGN(4);
+ PROVIDE( _sbss = .);
+ *(.sbss*)
+ *(.gnu.linkonce.sb.*)
+ *(.bss*)
+ *(.gnu.linkonce.b.*)
+ *(COMMON*)
+ . = ALIGN(4);
+ PROVIDE( _ebss = .);
+ } >RAM AT>FLASH
+
+ PROVIDE( _end = _ebss);
+ PROVIDE( end = . );
+
+ .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
+ {
+ PROVIDE( _heap_end = . );
+ . = ALIGN(4);
+ PROVIDE(_susrstack = . );
+ . = . + __stack_size;
+ PROVIDE( _eusrstack = .);
+ __freertos_irq_stack_top = .;
+ } >RAM
+
+}
+
+
+
diff --git a/CH32V303-FreeRTOS/Startup/startup_ch32v30x_D8.S b/CH32V303-FreeRTOS/Startup/startup_ch32v30x_D8.S
index 2ea4898..a23e320 100644
--- a/CH32V303-FreeRTOS/Startup/startup_ch32v30x_D8.S
+++ b/CH32V303-FreeRTOS/Startup/startup_ch32v30x_D8.S
@@ -337,6 +337,7 @@ handle_reset:
csrw 0xbc0, t0
/* Enable interrupt nesting and hardware stack */
li t0, 0x1f
+ // li t0, 0x1e
csrw 0x804, t0
/* Enable floating point and global interrupt, configure privileged mode */
li t0, 0x7800
diff --git a/CH32V303-FreeRTOS/User/main.c b/CH32V303-FreeRTOS/User/main.c
index fc153f2..1ae12c7 100644
--- a/CH32V303-FreeRTOS/User/main.c
+++ b/CH32V303-FreeRTOS/User/main.c
@@ -19,6 +19,8 @@
#include "FreeRTOS.h"
#include "task.h"
+#include "freerotsTask.h"
+
/*********************************************************************
@@ -38,7 +40,8 @@ int main(void)
printf("SystemClk:%d\r\n", SystemCoreClock);
printf( "ChipID:%08x\r\n", DBGMCU_GetCHIPID() );
printf("FreeRTOS Kernel Version:%s\r\n", tskKERNEL_VERSION_NUMBER);
-
+
+ startApp();
while(1) {
printf("shouldn't run at here!!\n");
diff --git a/CH32V303-FreeRTOS/obj/App/tools/RingQueue/subdir.mk b/CH32V303-FreeRTOS/obj/App/tools/RingQueue/subdir.mk
index bffa3f7..6252892 100644
--- a/CH32V303-FreeRTOS/obj/App/tools/RingQueue/subdir.mk
+++ b/CH32V303-FreeRTOS/obj/App/tools/RingQueue/subdir.mk
@@ -17,4 +17,4 @@ OBJS += \
# Each subdirectory must supply rules for building sources it contributes
App/tools/RingQueue/%.o: ../App/tools/RingQueue/%.c
- @ riscv-none-embed-gcc -march=rv32imacxw -mabi=ilp32 -msmall-data-limit=8 -msave-restore -fmax-errors=20 -Os -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections -fno-common -Wunused -Wuninitialized -g -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/Debug" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/Core" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/User" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/Peripheral/inc" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/include" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/Common" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/GCC/RISC-V" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/GCC/RISC-V/chip_specific_extensions/RV32I_PFIC_no_extensions" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/MemMang" -std=gnu99 -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@)" -c -o "$@" "$<"
+ @ riscv-none-embed-gcc -march=rv32imacxw -mabi=ilp32 -msmall-data-limit=8 -msave-restore -fmax-errors=20 -Os -fmessage-length=0 -fsigned-char -ffunction-sections -fdata-sections -fno-common -Wunused -Wuninitialized -g -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/Debug" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/Core" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/User" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/Peripheral/inc" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/include" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/Common" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/GCC/RISC-V" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/GCC/RISC-V/chip_specific_extensions/RV32I_PFIC_no_extensions" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/FreeRTOS/portable/MemMang" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/App/hardwareDriver/Inc" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/App/tools" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/App/tools/RingQueue" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/App/functionalModule/Inc" -I"d:/psx/su806/2.software/mcu_git/CH32V303-FreeRTOS/App/application/Inc" -std=gnu99 -MMD -MP -MF"$(@:%.o=%.d)" -MT"$(@)" -c -o "$@" "$<"
diff --git a/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.elf b/CH32V303-FreeRTOS/obj/CH32V303-FreeRTOS.elf
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